DE2_115_NIOS_HOST_MOUSE_VGA.sdc

#************************************************************
# THIS IS A WIZARD-GENERATED FILE.                           
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# Version 11.1 Build 259 01/25/2012 Service Pack 2 SJ Full Version
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# Copyright (C) 1991-2011 Altera Corporation
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# functions, and any output files from any of the foregoing 
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# Clock constraints

create_clock -name "clock_50_1" -period 20.000ns [get_ports {CLOCK_50}]
create_clock -name "clock_50_2" -period 20.000ns [get_ports {CLOCK2_50}]
create_clock -name "clock_50_3" -period 20.000ns [get_ports {CLOCK3_50}]
create_clock -name "clock_27" -period 37.030ns [get_ports {TD_CLK27}]


# Automatically constrain PLL and other generated clocks
derive_pll_clocks -create_base_clocks

# Automatically calculate clock uncertainty to jitter and other effects.
derive_clock_uncertainty

# tsu/th constraints

# tco constraints

# tpd constraints