boots: emit more code comments

dinfuehr · Aug 5, 2023 · b6939ff · b6939ff
1 parent 522d24f
commit b6939ff
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Showing 6 changed files with 82 additions and 21 deletions.
diff --git a/dora-boots/assembler/arm64.dora b/dora-boots/assembler/arm64.dora
@@ -2075,19 +2075,25 @@ impl AssemblerArm64 {
     }
 
     pub fn finalize(): Array[UInt8] {
-        self.resolveJumps();
+        self.buffer.toArray()
+    }
+
+    pub fn size(): Int64 {
+        self.buffer.size()
+    }
+
+    pub fn alignCodeSize(align: Int64) {
         while self.buffer.size() % 16 != 0 {
-            self.ret();
+            self.brk(0i32);
         }
-        self.buffer.toArray()
     }
 
     fn finalizeTesting(): MachineCode {
         self.resolveJumps();
         MachineCode::new(self.buffer.toArray())
     }
 
-    fn resolveJumps() {
+    pub fn resolveJumps() {
         let old_position = self.buffer.position();
 
         for jmp in self.jumps {

diff --git a/dora-boots/assembler/x64.dora b/dora-boots/assembler/x64.dora
@@ -1372,24 +1372,26 @@ impl AssemblerX64 {
         self.jumps.push((pc, lbl, kind));
     }
 
-    fn size(): Int64 {
+    pub fn size(): Int64 {
         self.buffer.size()
     }
 
     pub fn finalize(): Array[UInt8] {
-        self.resolveJumps();
+        self.buffer.toArray()
+    }
+
+    pub fn alignCodeSize(align: Int64) {
         while self.buffer.size() % 16 != 0 {
             self.int3();
         }
-        self.buffer.toArray()
     }
 
     pub fn finalizeTesting(): MachineCode {
         self.resolveJumps();
         MachineCode::new(self.buffer.toArray())
     }
 
-    fn resolveJumps() {
+    pub fn resolveJumps() {
         for (pc, lbl, distance) in self.jumps {
             assert(lbl.isBound());
 

diff --git a/dora-boots/codegen.dora b/dora-boots/codegen.dora
@@ -8,6 +8,8 @@ use package::graph::{Inst, LocationData, Op};
 pub mod arm64;
 pub mod x64;
 
+const CODE_SIZE_ALIGNMENT: Int64 = 16;
+
 pub trait CodeGen {
     fn allocatableRegisters(): RegSet;
     fn argumentRegister(idx: Int64): Register;

diff --git a/dora-boots/codegen/arm64.dora b/dora-boots/codegen/arm64.dora
@@ -1,5 +1,5 @@
 use package::interface::{Architecture, CompilationInfo, config, TRAP_DIV0};
-use package::codegen::{CodeGen, CodeDescriptor, CommentTable, Location, LocationTable};
+use package::codegen::{CODE_SIZE_ALIGNMENT, CodeGen, CodeDescriptor, CommentTable, Location, LocationTable};
 use package::assembler::arm64::AssemblerArm64;
 use package::assembler::arm64::{R0, R1, R2, R3, R4, R5, R6, R7, R10, R11};
 use package::assembler::arm64::{REG_FP, REG_SP, REG_LR};
@@ -11,6 +11,7 @@ pub class CodeGenArm64 {
     asm: AssemblerArm64,
     locations: LocationTable,
     comments: CommentTable,
+    deferred: Vec[(): ()],
 }
 
 impl CodeGenArm64 {
@@ -20,6 +21,7 @@ impl CodeGenArm64 {
             AssemblerArm64::new(),
             LocationTable::new(),
             CommentTable::new(),
+            Vec[(): ()]::new(),
         )
     }
 
@@ -29,6 +31,7 @@ impl CodeGenArm64 {
     }
 
     fn epilog() {
+        self.emitComment("epilog");
         self.asm.mov(REG_SP, REG_FP);
         self.asm.ldp_post(REG_FP, REG_LR, REG_SP, 16i32);
         self.asm.ret();
@@ -47,6 +50,16 @@ impl CodeGenArm64 {
         self.asm.movk(dest, ((imm >> 32i32) & 0xFF_FF).toInt32(), 32i32);
         self.asm.movk(dest, ((imm >> 48i32) & 0xFF_FF).toInt32(), 48i32);
     }
+
+    fn emitComment(comment: String) {
+        self.comments.insert(self.asm.position(), comment);
+    }
+
+    fn emitDeferredCode() {
+        for code in self.deferred {
+            code();
+        }
+    }
 }
 
 let REG_PARAMS: Array[Register] = Array[Register]::new(R0, R1, R2, R3, R4, R5, R6, R7);
@@ -122,19 +135,24 @@ impl CodeGen for CodeGenArm64 {
 
         let output = loc.getOutput().getRegister();
 
+        self.emitComment("CheckedMod");
         self.asm.sdiv(output, lhs, rhs);
-                    self.asm
-                        .msub(output, REG_TMP1, rhs, lhs);
+        self.asm.msub(output, REG_TMP1, rhs, lhs);
     }
 
     fn emitDivZeroCheck(inst: Inst) {
         let loc = inst.getLocationData();
         let op = loc.getInput(0).getRegister();
 
-        let lbl_continue = self.asm.createLabel();
-        self.asm.cbnz(op, lbl_continue);
-        self.trap(REG_TMP1, TRAP_DIV0, self.info.bc.getLocationAt(inst.bytecode_position()));
-        self.asm.bindLabel(lbl_continue);
+        let lbl_failure = self.asm.createLabel();
+        self.emitComment("div-by-0 check");
+        self.asm.cbz(op, lbl_failure);
+
+        self.deferred.push(|| {
+            self.emitComment("slow path for div-by-0 check");
+            self.asm.bindLabel(lbl_failure);
+            self.trap(REG_TMP1, TRAP_DIV0, self.info.bc.getLocationAt(inst.bytecode_position()));
+        });
     }
 
     fn emitReturn(inst: Inst) {
@@ -151,6 +169,12 @@ impl CodeGen for CodeGenArm64 {
     }
 
     fn finalize(): CodeDescriptor {
+        self.emitDeferredCode();
+        self.asm.resolveJumps();
+        if self.asm.size() % CODE_SIZE_ALIGNMENT != 0 {
+            self.emitComment("align code");
+            self.asm.alignCodeSize(CODE_SIZE_ALIGNMENT);
+        }
         let code = self.asm.finalize();
 
         CodeDescriptor(

diff --git a/dora-boots/codegen/x64.dora b/dora-boots/codegen/x64.dora
@@ -3,7 +3,7 @@ use package::assembler::x64::{RAX, RDI, RDX, RCX, RSI, RBP, RSP};
 use package::assembler::x64::{R8, R9, R10, R11};
 use package::assembler::{Register, RegSet};
 use package::bytecode::data::Location;
-use package::codegen::{CodeGen, CodeDescriptor, CommentTable, LocationTable};
+use package::codegen::{CODE_SIZE_ALIGNMENT, CodeGen, CodeDescriptor, CommentTable, LocationTable};
 use package::interface::{Architecture, CompilationInfo, config, TRAP_DIV0};
 use package::graph::{Inst, Op, LocationData};
 
@@ -12,6 +12,7 @@ pub class CodeGenX64 {
     asm: AssemblerX64,
     locations: LocationTable,
     comments: CommentTable,
+    deferred: Vec[(): ()],
 }
 
 impl CodeGenX64 {
@@ -21,10 +22,12 @@ impl CodeGenX64 {
             AssemblerX64::new(),
             LocationTable::new(),
             CommentTable::new(),
+            Vec[(): ()]::new(),
         )
     }
 
     fn epilog() {
+        self.emitComment("epilog");
         self.asm.movq_rr(RSP, RBP);
         self.asm.popq_r(RBP);
         self.asm.retq();
@@ -36,6 +39,16 @@ impl CodeGenX64 {
         self.asm.call_r(tmp);
         self.locations.insert(self.asm.position(), loc);
     }
+
+    fn emitComment(comment: String) {
+        self.comments.insert(self.asm.position(), comment);
+    }
+
+    fn emitDeferredCode() {
+        for code in self.deferred {
+            code();
+        }
+    }
 }
 
 pub let REG_PARAMS: Array[Register] = Array[Register]::new(RDI, RSI, RDX, RCX, R8, R9);
@@ -104,6 +117,8 @@ impl CodeGen for CodeGenX64 {
 
         let output = loc.getOutput().getRegister();
 
+        self.emitComment("CheckedDiv");
+
         if output != RAX {
             self.asm.movq_rr(REG_TMP1, RAX);
         }
@@ -127,18 +142,24 @@ impl CodeGen for CodeGenX64 {
     }
 
     fn emitCheckedMod(inst: Inst) {
+        self.emitComment("CheckedMod");
         unreachable[()]();
     }
 
     fn emitDivZeroCheck(inst: Inst) {
         let loc = inst.getLocationData();
         let op = loc.getInput(0).getRegister();
 
-        let lbl_continue = self.asm.createLabel();
+        let lbl_failure = self.asm.createLabel();
+        self.emitComment("div-by-0 check");
         self.asm.testq_rr(op, op);
-        self.asm.jcc_near(Condition::NotZero, lbl_continue);
-        self.trap(REG_TMP1, TRAP_DIV0, self.info.bc.getLocationAt(inst.bytecode_position()));
-        self.asm.bindLabel(lbl_continue);
+        self.asm.jcc_near(Condition::Zero, lbl_failure);
+
+        self.deferred.push(|| {
+            self.emitComment("slow path for div-by-0 check");
+            self.asm.bindLabel(lbl_failure);
+            self.trap(REG_TMP1, TRAP_DIV0, self.info.bc.getLocationAt(inst.bytecode_position()));
+        });
     }
 
     fn emitReturn(inst: Inst) {
@@ -155,6 +176,12 @@ impl CodeGen for CodeGenX64 {
     }
 
     fn finalize(): CodeDescriptor {
+        self.emitDeferredCode();
+        self.asm.resolveJumps();
+        if self.asm.size() % CODE_SIZE_ALIGNMENT != 0 {
+            self.emitComment("align code");
+            self.asm.alignCodeSize(CODE_SIZE_ALIGNMENT);
+        }
         let code = self.asm.finalize();
 
         CodeDescriptor(

diff --git a/dora/Cargo.toml b/dora/Cargo.toml
@@ -16,4 +16,4 @@ capstone = ["dora-runtime/capstone"]
 bincode = "2.0.0-rc.3"
 dora-frontend = { path = "../dora-frontend", version = "0.0.2" }
 dora-bytecode = { path = "../dora-bytecode", version = "0.0.2" }
-dora-runtime = { path = "../dora-runtime", version = "0.0.2", default-features = false }
+dora-runtime = { path = "../dora-runtime", version = "0.0.2" }