Cache bus clock register and support clock source

[bugadani]

Rough draft of my idea to resolve (eventually) #1666 and #1668

The main idea is to handle clock source and clock frequency as a unit, instead of separate values. This allows us to calculate and store the register value to save time when reapplying the same configuration.

The idea relies on peripherals having the same possible set of clock sources. I think that's generally okay, as we don't aim to support LP peripherals with the same drivers, for example.

I've chosen to update right before applying, so that writing the fields is trivial. This means Config is no longer Copy, which is a pretty unfortunate side-effect. We can, instead, update on each field update, which makes things a bit more expensive. We can also provide a chain updater that uses Drop trickery to update when the user is done touching the struct. This is more of an implementation detail than a substantial part of the design at this point.

The BuilderLite change is supposed to provide a semblance of backwards compatibility, especially since SPI really only supports PLL clock source in half of the chips and selecting Xtal also feels pretty rare in those that support it.