[ESP32-S2] How do I use the I2S to control a 8-bit parallel LCD? (IDFGH-3242) #5238
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esp32-s2-parallel-master.tar.gz Hi, There is no I2S LCD supports for ESP32-S2 chip in IOT-solution currently, but the example in the attachment is how to configure the I2S LCD mode for the ESP32-S2 chip. |
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Hi, @csobrinho |
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Yes, my code is based on the example code for the ESP32 but doesn't work
with the ESP32-S2. I even checked the output with a logic analyzer and I
can't see any change on the pins except the RS pin.
…On Tue, May 12, 2020, 02:30 kooho ***@***.***> wrote:
Hi, @csobrinho <https://github.com/csobrinho>
Have you tried the example code?
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Well, you may have misunderstood what I meant. I mean the compression package I sent you (esp32-s2-parallel-master.tar.gz) . Have you tried it? |
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Will try it today and post results tomorrow. Thanks!
…On Wed, May 13, 2020, 19:14 kooho ***@***.***> wrote:
Well, you may have misunderstood what I meant. I mean the compression
package I sent you (esp32-s2-parallel-master.tar.gz) . Have you tried it?
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Hi @koobest, I tried this adapted version but only saw the I adapted the current example for 8 bits instead of 24 but also tried the 24 bits version with same result. Please find attached the modified version (some headers fixes and different data pins). Here's the logic analyzer: And the log output: /* Hello World Example
This example code is in the Public Domain (or CC0 licensed, at your option.)
Unless required by applicable law or agreed to in writing, this
software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
CONDITIONS OF ANY KIND, either express or implied.
*/
#include <stdio.h>
#include "sdkconfig.h"
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "driver/gpio.h"
#include "esp_system.h"
#include "i2s_parallel.h"
/* I2S i2s_parallel interface configure part */
#define CLK GPIO_NUM_38
#define D0 GPIO_NUM_2
#define D1 GPIO_NUM_1
#define D2 GPIO_NUM_8
#define D3 GPIO_NUM_7
#define D4 GPIO_NUM_6
#define D5 GPIO_NUM_5
#define D6 GPIO_NUM_4
#define D7 GPIO_NUM_3
#define D8 GPIO_NUM_9
#define D9 GPIO_NUM_10
#define D10 GPIO_NUM_11
#define D11 GPIO_NUM_12
#define D12 GPIO_NUM_13
#define D13 GPIO_NUM_14
#define D14 GPIO_NUM_15
#define D15 GPIO_NUM_16
#define D16 GPIO_NUM_17
#define D17 GPIO_NUM_18
#define D18 GPIO_NUM_19
#define D19 GPIO_NUM_20
#define D20 GPIO_NUM_21
#define D21 GPIO_NUM_26
#define D22 GPIO_NUM_27
#define D23 GPIO_NUM_28
i2s_parallel_pin_config_t i2s_parallel_bus = {
.bit_width = 8,
.pin_clk = CLK,
.data = {D0, D1, D2, D3, D4, D5, D6, D7}, // D8, D9, D10, D11, D12, D13, D14, D15, D16, D17, D18, D19, D20, D21, D22, D23},
};
typedef struct {
uint8_t bits_7_0;
// uint8_t bits_15_8;
// uint8_t bits_23_16;
} parallel_data_t;
parallel_data_t data[4096];
void app_main(void)
{
printf("Hello world!\n");
for (uint32_t x = 0; x < 4096; x++) {
// data[x].bits_23_16 = x;
// data[x].bits_15_8 = x;
data[x].bits_7_0 = x;
}
i2s_parallel_init(&i2s_parallel_bus, 4);// clk_fre = 40MHz / clk_div
while (1) {
i2s_parallel_write_data((uint8_t *)data, sizeof(parallel_data_t) * 4096);
vTaskDelay(10 / portTICK_RATE_MS);
}
}And the log output: |
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Hi, @csobrinho Sorry, the GPIO configuration we gave is incorrect. 8bit mode: I2S0O_DATA_OUT16_IDX ~I2S0O_DATA_OUT23_IDX please use this one: |
WS is working DATA is not working
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@csobrinho |
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Yes, I believe so. It seems to be working but somehow the framerate doesn't seem that good. I'll capture some logic analyzer timings and post here. One of the things I had to do was swap the low/high byte to make sure the order was good. Is there anything on the hardware that could do this? My main code is here: I also added a new parameter (buffer policy) to the So that you can reuse the same buffer. This is very useful when clearing a screen with a specific color. With this change, you can set a small buffer with the color and just setup the necessary |
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The hardware don't support this feature. |
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Sorry, haven't been able to capture the logic analyser timings yet. This week for sure! On a different note, I saw in the ESP32-S2 datasheet that there is some magical support for serial 8080 LCD interface using the SPI 2. Would this allow me to add a shift register to the SPI port and have WR (and optionally R/D and CS) to toggle and latch the output? That and FIFO (for small register writes) and DMA (for big fills) support would be a killer option to save some precious GPIOs. Thanks for your help dealing with this, it has completely unblocked and helped me a lot! |
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In SPI 8080 LCD mode, the data bus is 8 bits wide. Therefore, we cannot control the WR signal through the shift register. But in the CMD phase and DATA phase, we can control the CD signal by setting or clearing the registers |
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Bummer. I was planning to convert the SPI serial data into parallel using a shift register but I need a good way to signal the 8 bit shift is done, latch the data and toggle WR. If I can't do this with the hardware I might need to add: Any suggestions? Thanks! |
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Sorry, I don't understand why you need convert the SPI serial data into parallel. |
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The LCD is parallel 8080 (RM68090) but I wanted to save some precious GPIOs so was thinking of using the SPI connected to a shift register to convert to parallel and connect the LCD D0-7 to the shift register. The problem is identifying when the 8th clock is shifted and trigger the WR. |
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If I use the SPI at 40 MHz, I could (at most) shift about 32fps (40M / 8 / (2403202)) |
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Thanks for reporting and updates. Feel free to reopen if the issue still happens. Thanks. |
Environment
git describe --tagsto find it):// v4.2-dev-1126-gd85d3d969
xtensa-esp32-elf-gcc --versionto find it):// xtensa-esp32s2-elf-gcc (crosstool-NG esp-2020r1) 8.2.0
Problem Description
I'm trying to use the I2S to control a RM68090 8-bit parallel LCD with the ESP32-S2 based on the existing code that I already have for the ESP32. My code is uses most of the esp-iot-solution lcd_common example with some custom additions/fixes.
I see the RS toggling but no WR toggling. If I try to use the FIFO the same happens.
This is my config:
I've tried to search the docs but not a lot of info about LCD mode. From what I can see on
Table 102: Peripherals and FIFO Address, the FIFO location changed:to
I tested with and without this change and I still can't use the DMA and/or the FIFO and that's why I'm requesting some support. I remember reading on previous tickets [esp-iot-solution/issues/71] and [esp-iot-solution/issues/19] that 8 bit was rather cumbersome on the ESP32 but was improved for the ESP32-S2 (remember reading something about this on the forum).
Thank you!
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