refactor(core): rename prop

exuanbo · Oct 4, 2024 · 68a22d4 · 68a22d4
1 parent 4b80894
commit 68a22d4
Show file tree

Hide file tree

Showing 2 changed files with 3 additions and 3 deletions.
diff --git a/src/core/bus/bus.ts b/src/core/bus/bus.ts
@@ -29,7 +29,7 @@ export class Bus {
   readonly address$ = new BehaviorSubject(0x00)
   readonly control$ = new BehaviorSubject(initialControlLines)
 
-  readonly controlOnClockRise$: Observable<ControlLines> = this.control$.pipe(
+  readonly clockRise$: Observable<ControlLines> = this.control$.pipe(
     filter((control, index) => (index && control.CLK)),
     share(),
   )

diff --git a/src/core/cpu/cpu.ts b/src/core/cpu/cpu.ts
@@ -22,7 +22,7 @@ export class Cpu {
       RD:   0b1,
       MREQ: 0b1,
     })
-    yield this.bus.controlOnClockRise$.pipe(take(1))
+    yield this.bus.clockRise$.pipe(take(1))
     this.bus.setControl({
       RD:   0b0,
       MREQ: 0b0,
@@ -37,7 +37,7 @@ export class Cpu {
       WR:   0b1,
       MREQ: 0b1,
     })
-    yield this.bus.controlOnClockRise$.pipe(take(1))
+    yield this.bus.clockRise$.pipe(take(1))
     this.bus.setControl({
       WR:   0b0,
       MREQ: 0b0,