Release v1.3.0

firmwaremodules · Nov 10, 2022 · 1233b3b · 1233b3b
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diff --git a/Docs/README.md b/Docs/README.md
diff --git a/Docs/stm32-secure-patching-bootloader-QSG_rev2_May2022.pdf b/Docs/stm32-secure-patching-bootloader-QSG_rev2_May2022.pdf
diff --git a/Docs/stm32-secure-patching-bootloader-QSG_rev3_Nov2022.pdf b/Docs/stm32-secure-patching-bootloader-QSG_rev3_Nov2022.pdf
diff --git a/Include/README.md b/Include/README.md
@@ -2,6 +2,6 @@
 
 ## Includes
 
-The application-level 'C' interface to the bootloader is provided here.  With this interface the application can invoke functions to perform operations such as in-application OTA patching update.
+The application-level 'C' interface to the bootloader is provided here.  With this interface the application can invoke functions to perform operations such as in-application OTA firmware update or read bootloader and application firmware versions.
 
 
diff --git a/...re_patching_bootloader_interface_v1.2.0.h → ...re_patching_bootloader_interface_v1.3.0.h b/...re_patching_bootloader_interface_v1.2.0.h → ...re_patching_bootloader_interface_v1.3.0.h
diff --git a/...otloader-README_B-L072Z-LRWAN1_v1.2.0.txt → ...otloader-README_B-L072Z-LRWAN1_v1.3.0.txt b/...otloader-README_B-L072Z-LRWAN1_v1.2.0.txt → ...otloader-README_B-L072Z-LRWAN1_v1.3.0.txt
diff --git a/Libs/B-L072Z-LRWAN1/stm32-secure-patching-bootloader-interface-gcc_B-L072Z-LRWAN1_v1.2.0.o b/Libs/B-L072Z-LRWAN1/stm32-secure-patching-bootloader-interface-gcc_B-L072Z-LRWAN1_v1.2.0.o
diff --git a/Libs/B-L072Z-LRWAN1/stm32-secure-patching-bootloader-linker-gcc_B-L072Z-LRWAN1_v1.2.0.ld b/Libs/B-L072Z-LRWAN1/stm32-secure-patching-bootloader-linker-gcc_B-L072Z-LRWAN1_v1.2.0.ld
diff --git a/Libs/B-L072Z-LRWAN1/stm32-secure-patching-bootloader-linker-gcc_B-L072Z-LRWAN1_v1.3.0.ld b/Libs/B-L072Z-LRWAN1/stm32-secure-patching-bootloader-linker-gcc_B-L072Z-LRWAN1_v1.3.0.ld
@@ -0,0 +1,15 @@
+SE_APP_GetActiveFwInfo = 0x08006e00;
+SE_APP_GetBootVer = 0x08006e98;
+SE_APP_GetSecureUserData = 0x08006e4c;
+SE_APP_SVC_Handler = 0x08006e44;
+SE_PATCH_Abort = 0x0800789c;
+SE_PATCH_Data = 0x080077f0;
+SE_PATCH_Init = 0x080077a0;
+SE_PATCH_InitStatus = 0x08007784;
+SE_PATCH_InstallAtNextReset = 0x08007848;
+SE_PATCH_Poll = 0x08007890;
+SE_PATCH_PrintStatus = 0x08007794;
+STM32_SECURE_PATCHING_BOOTLOADER_RAM_START = 0x20001500;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_END = 0x0801efff;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_START = 0x0800e000;
+VECTOR_SIZE = 0x00000200;
diff --git a/...loader-postbuild_B-L072Z-LRWAN1_v1.2.0.sh → ...loader-postbuild_B-L072Z-LRWAN1_v1.3.0.sh b/...loader-postbuild_B-L072Z-LRWAN1_v1.2.0.sh → ...loader-postbuild_B-L072Z-LRWAN1_v1.3.0.sh
diff --git a/Libs/B-L072Z-LRWAN1/stm32-secure-patching-bootloader_B-L072Z-LRWAN1_v1.2.0.bin.asc b/Libs/B-L072Z-LRWAN1/stm32-secure-patching-bootloader_B-L072Z-LRWAN1_v1.2.0.bin.asc
diff --git a/...hing-bootloader_B-L072Z-LRWAN1_v1.2.0.bin → ...hing-bootloader_B-L072Z-LRWAN1_v1.3.0.bin b/...hing-bootloader_B-L072Z-LRWAN1_v1.2.0.bin → ...hing-bootloader_B-L072Z-LRWAN1_v1.3.0.bin
diff --git a/Libs/B-L072Z-LRWAN1/stm32-secure-patching-bootloader_B-L072Z-LRWAN1_v1.3.0.bin.asc b/Libs/B-L072Z-LRWAN1/stm32-secure-patching-bootloader_B-L072Z-LRWAN1_v1.3.0.bin.asc
@@ -0,0 +1 @@
+d7feb5098be8b0807ea436c2420e04219cea8153f9436cd8dc52cf26f77f5298 stm32-secure-patching-bootloader_B-L072Z-LRWAN1_v1.3.0.bin
diff --git a/Libs/B-L4S5I-IOT01A/stm32-secure-patching-bootloader-README_B-L4S5I-IOT01A_v1.3.0.txt b/Libs/B-L4S5I-IOT01A/stm32-secure-patching-bootloader-README_B-L4S5I-IOT01A_v1.3.0.txt
@@ -0,0 +1,35 @@
+# Board configuration 
+
+/* Configuration for 2  MB flash device.
+ * internal sector size: 4K (dual bank mode - default)
+ *   
+ *  STM32L4S5 Internal flash        
+ * -------------------------------------------- -------------------
+ * | SBSFU  |  SLOT 0              | SLOT1                        |
+ * ----------------------------------------------------------------
+ *   80              984                         984
+ * 
+ * 0x08000000
+ *          0x08014000
+ *                                 0x08109FFF
+ *                                  0x0810A000
+ *
+ *                                                                 0x081FFFFF
+ */
+
+| Feature   | B-L4S5I-IOT01A | 
+| ---       | ---         |
+| NAME      | B-L4S5I-IOT01A
+| UART      | USART1 TX:PB6 RX:PB7 AF7  115200,8,N,1
+| BUTTON    | PC13 ACTIVE LOW 
+| LED       | GREEN/LED2/PB14
+| FLASH     | 2048
+| RAM       | 640 (192 SRAM1 + 64 SRAM2 + 384 SRAM3)
+| DEVID     | 0x470
+| CLK       | MSI,40,120,HSI48 
+| YMODEM    | YES
+| USB       | NO "User must add 8 MHz crystal at X1 to use USB OTG"
+| EXT FLASH | NO
+| MULTISEG  | NO
+| Product   | https://www.st.com/en/evaluation-tools/b-l4s5i-iot01a.html
+
diff --git a/Libs/B-L4S5I-IOT01A/stm32-secure-patching-bootloader-linker-gcc_B-L4S5I-IOT01A_v1.3.0.ld b/Libs/B-L4S5I-IOT01A/stm32-secure-patching-bootloader-linker-gcc_B-L4S5I-IOT01A_v1.3.0.ld
@@ -0,0 +1,15 @@
+SE_APP_GetActiveFwInfo = 0x08007500;
+SE_APP_GetBootVer = 0x0800758c;
+SE_APP_GetSecureUserData = 0x08007544;
+SE_APP_SVC_Handler = 0x08007540;
+SE_PATCH_Abort = 0x0800804c;
+SE_PATCH_Data = 0x08007fa4;
+SE_PATCH_Init = 0x08007f54;
+SE_PATCH_InitStatus = 0x08007f3c;
+SE_PATCH_InstallAtNextReset = 0x08007ffc;
+SE_PATCH_Poll = 0x08008044;
+SE_PATCH_PrintStatus = 0x08007f48;
+STM32_SECURE_PATCHING_BOOTLOADER_RAM_START = 0x20001700;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_END = 0x08109fff;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_START = 0x08014000;
+VECTOR_SIZE = 0x00000200;
diff --git a/...ootloader-postbuild_DISCO-L476G_v1.2.0.sh → ...loader-postbuild_B-L4S5I-IOT01A_v1.3.0.sh b/...ootloader-postbuild_DISCO-L476G_v1.2.0.sh → ...loader-postbuild_B-L4S5I-IOT01A_v1.3.0.sh
diff --git a/Libs/B-L4S5I-IOT01A/stm32-secure-patching-bootloader_B-L4S5I-IOT01A_v1.3.0.bin b/Libs/B-L4S5I-IOT01A/stm32-secure-patching-bootloader_B-L4S5I-IOT01A_v1.3.0.bin
diff --git a/Libs/B-L4S5I-IOT01A/stm32-secure-patching-bootloader_B-L4S5I-IOT01A_v1.3.0.bin.asc b/Libs/B-L4S5I-IOT01A/stm32-secure-patching-bootloader_B-L4S5I-IOT01A_v1.3.0.bin.asc
@@ -0,0 +1 @@
+49e5488672858f28b71477967bcc1fd2505ef5a02c8ee1396a8bcef9a6d145f4 stm32-secure-patching-bootloader_B-L4S5I-IOT01A_v1.3.0.bin
diff --git a/...-bootloader-README_DISCO-F769I_v1.2.0.txt → ...-bootloader-README_DISCO-F769I_v1.3.0.txt b/...-bootloader-README_DISCO-F769I_v1.2.0.txt → ...-bootloader-README_DISCO-F769I_v1.3.0.txt
diff --git a/Libs/DISCO-F769I/stm32-secure-patching-bootloader-interface-gcc_DISCO-F769I_v1.2.0.o b/Libs/DISCO-F769I/stm32-secure-patching-bootloader-interface-gcc_DISCO-F769I_v1.2.0.o
diff --git a/Libs/DISCO-F769I/stm32-secure-patching-bootloader-linker-gcc_DISCO-F769I_v1.2.0.ld b/Libs/DISCO-F769I/stm32-secure-patching-bootloader-linker-gcc_DISCO-F769I_v1.2.0.ld
diff --git a/Libs/DISCO-F769I/stm32-secure-patching-bootloader-linker-gcc_DISCO-F769I_v1.3.0.ld b/Libs/DISCO-F769I/stm32-secure-patching-bootloader-linker-gcc_DISCO-F769I_v1.3.0.ld
@@ -0,0 +1,16 @@
+SE_APP_GetActiveFwInfo = 0x08008800;
+SE_APP_GetBootVer = 0x0800888c;
+SE_APP_GetSecureUserData = 0x08008844;
+SE_APP_SVC_Handler = 0x08008840;
+SE_PATCH_Abort = 0x0800934c;
+SE_PATCH_Data = 0x080092a4;
+SE_PATCH_Init = 0x08009254;
+SE_PATCH_InitStatus = 0x0800923c;
+SE_PATCH_InstallAtNextReset = 0x080092fc;
+SE_PATCH_Poll = 0x08009344;
+SE_PATCH_PrintStatus = 0x08009248;
+STM32_SECURE_PATCHING_BOOTLOADER_MULTISEG_START = 0x90000000;
+STM32_SECURE_PATCHING_BOOTLOADER_RAM_START = 0x20022700;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_END = 0x081fffff;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_START = 0x08040000;
+VECTOR_SIZE = 0x00000400;
diff --git a/...ootloader-postbuild_DISCO-F769I_v1.2.0.sh → ...ootloader-postbuild_DISCO-F769I_v1.3.0.sh b/...ootloader-postbuild_DISCO-F769I_v1.2.0.sh → ...ootloader-postbuild_DISCO-F769I_v1.3.0.sh
diff --git a/Libs/DISCO-F769I/stm32-secure-patching-bootloader_DISCO-F769I_v1.2.0.bin b/Libs/DISCO-F769I/stm32-secure-patching-bootloader_DISCO-F769I_v1.2.0.bin
diff --git a/Libs/DISCO-F769I/stm32-secure-patching-bootloader_DISCO-F769I_v1.2.0.bin.asc b/Libs/DISCO-F769I/stm32-secure-patching-bootloader_DISCO-F769I_v1.2.0.bin.asc
diff --git a/Libs/DISCO-F769I/stm32-secure-patching-bootloader_DISCO-F769I_v1.3.0.bin b/Libs/DISCO-F769I/stm32-secure-patching-bootloader_DISCO-F769I_v1.3.0.bin
diff --git a/Libs/DISCO-F769I/stm32-secure-patching-bootloader_DISCO-F769I_v1.3.0.bin.asc b/Libs/DISCO-F769I/stm32-secure-patching-bootloader_DISCO-F769I_v1.3.0.bin.asc
@@ -0,0 +1 @@
+0805fd7dab285dda3a02374bf35a0b4e1d78b08d5e24af205e1194b24544b567 stm32-secure-patching-bootloader_DISCO-F769I_v1.3.0.bin
diff --git a/...-bootloader-README_DISCO-L476G_v1.2.0.txt → ...-bootloader-README_DISCO-L476G_v1.3.0.txt b/...-bootloader-README_DISCO-L476G_v1.2.0.txt → ...-bootloader-README_DISCO-L476G_v1.3.0.txt
diff --git a/Libs/DISCO-L476G/stm32-secure-patching-bootloader-interface-gcc_DISCO-L476G_v1.2.0.o b/Libs/DISCO-L476G/stm32-secure-patching-bootloader-interface-gcc_DISCO-L476G_v1.2.0.o
diff --git a/Libs/DISCO-L476G/stm32-secure-patching-bootloader-linker-gcc_DISCO-L476G_v1.2.0.ld b/Libs/DISCO-L476G/stm32-secure-patching-bootloader-linker-gcc_DISCO-L476G_v1.2.0.ld
diff --git a/Libs/DISCO-L476G/stm32-secure-patching-bootloader-linker-gcc_DISCO-L476G_v1.3.0.ld b/Libs/DISCO-L476G/stm32-secure-patching-bootloader-linker-gcc_DISCO-L476G_v1.3.0.ld
@@ -0,0 +1,15 @@
+SE_APP_GetActiveFwInfo = 0x08007500;
+SE_APP_GetBootVer = 0x0800758c;
+SE_APP_GetSecureUserData = 0x08007544;
+SE_APP_SVC_Handler = 0x08007540;
+SE_PATCH_Abort = 0x0800804c;
+SE_PATCH_Data = 0x08007fa4;
+SE_PATCH_Init = 0x08007f54;
+SE_PATCH_InitStatus = 0x08007f3c;
+SE_PATCH_InstallAtNextReset = 0x08007ffc;
+SE_PATCH_Poll = 0x08008044;
+SE_PATCH_PrintStatus = 0x08007f48;
+STM32_SECURE_PATCHING_BOOTLOADER_RAM_START = 0x20001700;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_END = 0x08053fff;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_START = 0x08014000;
+VECTOR_SIZE = 0x00000200;
diff --git a/...ootloader-postbuild_DISCO-L496G_v1.2.0.sh → ...ootloader-postbuild_DISCO-L476G_v1.3.0.sh b/...ootloader-postbuild_DISCO-L496G_v1.2.0.sh → ...ootloader-postbuild_DISCO-L476G_v1.3.0.sh
diff --git a/Libs/DISCO-L476G/stm32-secure-patching-bootloader_DISCO-L476G_v1.2.0.bin.asc b/Libs/DISCO-L476G/stm32-secure-patching-bootloader_DISCO-L476G_v1.2.0.bin.asc
diff --git a/...atching-bootloader_DISCO-L476G_v1.2.0.bin → ...atching-bootloader_DISCO-L476G_v1.3.0.bin b/...atching-bootloader_DISCO-L476G_v1.2.0.bin → ...atching-bootloader_DISCO-L476G_v1.3.0.bin
diff --git a/Libs/DISCO-L476G/stm32-secure-patching-bootloader_DISCO-L476G_v1.3.0.bin.asc b/Libs/DISCO-L476G/stm32-secure-patching-bootloader_DISCO-L476G_v1.3.0.bin.asc
@@ -0,0 +1 @@
+902874f42b343c288019ad7c915d437f015deb382da86010cfac0842602f42e9 stm32-secure-patching-bootloader_DISCO-L476G_v1.3.0.bin
diff --git a/...-bootloader-README_DISCO-L496G_v1.2.0.txt → ...-bootloader-README_DISCO-L496G_v1.3.0.txt b/...-bootloader-README_DISCO-L496G_v1.2.0.txt → ...-bootloader-README_DISCO-L496G_v1.3.0.txt
diff --git a/Libs/DISCO-L496G/stm32-secure-patching-bootloader-interface-gcc_DISCO-L496G_v1.2.0.o b/Libs/DISCO-L496G/stm32-secure-patching-bootloader-interface-gcc_DISCO-L496G_v1.2.0.o
diff --git a/Libs/DISCO-L496G/stm32-secure-patching-bootloader-linker-gcc_DISCO-L496G_v1.2.0.ld b/Libs/DISCO-L496G/stm32-secure-patching-bootloader-linker-gcc_DISCO-L496G_v1.2.0.ld
diff --git a/Libs/DISCO-L496G/stm32-secure-patching-bootloader-linker-gcc_DISCO-L496G_v1.3.0.ld b/Libs/DISCO-L496G/stm32-secure-patching-bootloader-linker-gcc_DISCO-L496G_v1.3.0.ld
@@ -0,0 +1,15 @@
+SE_APP_GetActiveFwInfo = 0x08007500;
+SE_APP_GetBootVer = 0x0800758c;
+SE_APP_GetSecureUserData = 0x08007544;
+SE_APP_SVC_Handler = 0x08007540;
+SE_PATCH_Abort = 0x0800804c;
+SE_PATCH_Data = 0x08007fa4;
+SE_PATCH_Init = 0x08007f54;
+SE_PATCH_InitStatus = 0x08007f3c;
+SE_PATCH_InstallAtNextReset = 0x08007ffc;
+SE_PATCH_Poll = 0x08008044;
+SE_PATCH_PrintStatus = 0x08007f48;
+STM32_SECURE_PATCHING_BOOTLOADER_RAM_START = 0x20001700;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_END = 0x08053fff;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_START = 0x08014000;
+VECTOR_SIZE = 0x00000200;
diff --git a/...ootloader-postbuild_LORA-E5-DEV_v1.2.0.sh → ...ootloader-postbuild_DISCO-L496G_v1.3.0.sh b/...ootloader-postbuild_LORA-E5-DEV_v1.2.0.sh → ...ootloader-postbuild_DISCO-L496G_v1.3.0.sh
diff --git a/Libs/DISCO-L496G/stm32-secure-patching-bootloader_DISCO-L496G_v1.2.0.bin b/Libs/DISCO-L496G/stm32-secure-patching-bootloader_DISCO-L496G_v1.2.0.bin
diff --git a/Libs/DISCO-L496G/stm32-secure-patching-bootloader_DISCO-L496G_v1.2.0.bin.asc b/Libs/DISCO-L496G/stm32-secure-patching-bootloader_DISCO-L496G_v1.2.0.bin.asc
diff --git a/Libs/DISCO-L496G/stm32-secure-patching-bootloader_DISCO-L496G_v1.3.0.bin b/Libs/DISCO-L496G/stm32-secure-patching-bootloader_DISCO-L496G_v1.3.0.bin
diff --git a/Libs/DISCO-L496G/stm32-secure-patching-bootloader_DISCO-L496G_v1.3.0.bin.asc b/Libs/DISCO-L496G/stm32-secure-patching-bootloader_DISCO-L496G_v1.3.0.bin.asc
@@ -0,0 +1 @@
+c8071f2c2bbe6a1ce5fcc541b9128c13cf482a80a71525795110ccf55462bd8b stm32-secure-patching-bootloader_DISCO-L496G_v1.3.0.bin
diff --git a/Libs/DISCO-L4R9I/stm32-secure-patching-bootloader-README_DISCO-L4R9I_v1.3.0.txt b/Libs/DISCO-L4R9I/stm32-secure-patching-bootloader-README_DISCO-L4R9I_v1.3.0.txt
@@ -0,0 +1,42 @@
+# Board configuration 
+
+/* Configuration for 2  MB flash device.
+ * Flash: 512 Mb OCTOSPI MX25LM51245GXDI00
+ * internal sector size: 4K (dual bank mode - default)
+ * external sector size: 4K, 32K or 64K (64K used as block)
+ * SBSFU is around 82K fully loaded with External flash/Multiseg + USB flash loader
+ *   
+ *  STM32L4R9 Internal flash                           MX25LM51245G 64 MB External flash
+ * ---------------------------------   -----------   -------------------------------------------------
+ * | SBSFU  |  SLOT 0 SEG0         |   | SLOT0 SEG1 X sectors | SLOT1                       | ...    |
+ * ---------------------------------   ---------------------------------------------------------------
+ *   84              1964                         4096              1964 + 4096
+ * 
+ *
+ * 0x08000000
+ *          0x08015000
+ *                                 
+ *                                 0x081FFFFF
+ *                                     0x90000000             
+ *                                                            0x90400000
+ *                                                                                         0x909EAFFF
+ *                                                                                          0x909EB000
+ *
+ */
+
+| Feature   | DISCO-L4R9I | 
+| ---       | ---         |
+| NAME      | 32L4R9IDISCOVERY
+| STATUS    | Active (8-11-22)
+| UART      | USART2 TX:PA2 RX:PA3 AF7  115200,8,N,1
+| BUTTON    | (JOY-SEL) PC13 ACTIVE HIGH 
+| LED       | GREEN/LED2/PH4
+| FLASH     | 2048
+| RAM       | 640 (192 SRAM1 + 64 SRAM2 + 384 SRAM3)
+| DEVID     | 0x470
+| CLK       | MSI,40,120,HSI48 
+| YMODEM    | YES
+| USB       | YES  PWR: MFX_GPIO13
+| EXT FLASH | YES  512 Mb OCTOSPI MX25LM51245GXDI00
+| MULTISEG  | YES  0x90000000 (OCTOSPI1)
+| Product   | https://www.st.com/en/evaluation-tools/32l4r9idiscovery.html
diff --git a/Libs/DISCO-L4R9I/stm32-secure-patching-bootloader-linker-gcc_DISCO-L4R9I_v1.3.0.ld b/Libs/DISCO-L4R9I/stm32-secure-patching-bootloader-linker-gcc_DISCO-L4R9I_v1.3.0.ld
@@ -0,0 +1,16 @@
+SE_APP_GetActiveFwInfo = 0x08007500;
+SE_APP_GetBootVer = 0x0800758c;
+SE_APP_GetSecureUserData = 0x08007544;
+SE_APP_SVC_Handler = 0x08007540;
+SE_PATCH_Abort = 0x0800804c;
+SE_PATCH_Data = 0x08007fa4;
+SE_PATCH_Init = 0x08007f54;
+SE_PATCH_InitStatus = 0x08007f3c;
+SE_PATCH_InstallAtNextReset = 0x08007ffc;
+SE_PATCH_Poll = 0x08008044;
+SE_PATCH_PrintStatus = 0x08007f48;
+STM32_SECURE_PATCHING_BOOTLOADER_MULTISEG_START = 0x90000000;
+STM32_SECURE_PATCHING_BOOTLOADER_RAM_START = 0x20001700;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_END = 0x081fffff;
+STM32_SECURE_PATCHING_BOOTLOADER_SLOT0_START = 0x08015000;
+VECTOR_SIZE = 0x00000200;
diff --git a/Libs/DISCO-L4R9I/stm32-secure-patching-bootloader-postbuild_DISCO-L4R9I_v1.3.0.sh b/Libs/DISCO-L4R9I/stm32-secure-patching-bootloader-postbuild_DISCO-L4R9I_v1.3.0.sh
@@ -0,0 +1,5 @@
+# Board-specific properties injected into the postbuild.sh script.
+
+VectOffset=512
+
+MultiSegAddr=0x90000000
diff --git a/Libs/DISCO-L4R9I/stm32-secure-patching-bootloader_DISCO-L4R9I_v1.3.0.bin b/Libs/DISCO-L4R9I/stm32-secure-patching-bootloader_DISCO-L4R9I_v1.3.0.bin
diff --git a/Libs/DISCO-L4R9I/stm32-secure-patching-bootloader_DISCO-L4R9I_v1.3.0.bin.asc b/Libs/DISCO-L4R9I/stm32-secure-patching-bootloader_DISCO-L4R9I_v1.3.0.bin.asc
@@ -0,0 +1 @@
+0d4a53a0720193fe6f3aac81e0ec474826bdcfccb64449f05de55c11b1c05f25 stm32-secure-patching-bootloader_DISCO-L4R9I_v1.3.0.bin
diff --git a/Libs/DISCO-L562E/stm32-secure-patching-bootloader-README_DISCO-L562E_v1.3.0.txt b/Libs/DISCO-L562E/stm32-secure-patching-bootloader-README_DISCO-L562E_v1.3.0.txt
@@ -0,0 +1,34 @@
+# Board configuration 
+
+ *  STM32L5 Internal flash 512 KB                   
+ * -------------------------------------------------
+ * | SBSFU  | U | SLOT0          |  SLOT1          |  
+ * -------------------------------------------------
+ *   64      64     192                192
+ * 
+ * 0x08000000
+ *          0x08010000
+ *              0x08020000
+ *                              0x0804FFFF
+ *                               0x08050000
+ *                                                 0x0807FFFF
+ *
+ * U - unused/available sector(s)
+
+
+| Feature   | DISCO-L562E | 
+| ---       | ---         |
+| NAME      | STM32L562E-DK
+| UART      | USART1 TX:PA9 RX:PA10 AF7  115200,8,N,1
+| BUTTON    | PC13 ACTIVE HIGH
+| LED       | GREEN/LED10/PG12
+| FLASH     | 512
+| RAM       | 256 (192 SRAM1 + 64 SRAM2)
+| DEVID     | 0x472
+| CLK       | MSI,4,110
+| YMODEM    | YES
+| USB       | NO "The STM32L562E-DK Discovery kit supports USB Type-C sink mode only."
+| EXT FLASH | NO
+| MULTISEG  | NO
+| Product   | https://www.st.com/en/evaluation-tools/stm32l562e-dk.html
+
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Expand Up		@@ -2,6 +2,6 @@

		## Includes

		The application-level 'C' interface to the bootloader is provided here. With this interface the application can invoke functions to perform operations such as in-application OTA patching update.
		The application-level 'C' interface to the bootloader is provided here. With this interface the application can invoke functions to perform operations such as in-application OTA firmware update or read bootloader and application firmware versions.
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		@@ -0,0 +1 @@
		d7feb5098be8b0807ea436c2420e04219cea8153f9436cd8dc52cf26f77f5298 stm32-secure-patching-bootloader_B-L072Z-LRWAN1_v1.3.0.bin
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		@@ -0,0 +1 @@
		49e5488672858f28b71477967bcc1fd2505ef5a02c8ee1396a8bcef9a6d145f4 stm32-secure-patching-bootloader_B-L4S5I-IOT01A_v1.3.0.bin
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		0805fd7dab285dda3a02374bf35a0b4e1d78b08d5e24af205e1194b24544b567 stm32-secure-patching-bootloader_DISCO-F769I_v1.3.0.bin
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		@@ -0,0 +1 @@
		902874f42b343c288019ad7c915d437f015deb382da86010cfac0842602f42e9 stm32-secure-patching-bootloader_DISCO-L476G_v1.3.0.bin
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		@@ -0,0 +1 @@
		c8071f2c2bbe6a1ce5fcc541b9128c13cf482a80a71525795110ccf55462bd8b stm32-secure-patching-bootloader_DISCO-L496G_v1.3.0.bin
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		@@ -0,0 +1 @@
		0d4a53a0720193fe6f3aac81e0ec474826bdcfccb64449f05de55c11b1c05f25 stm32-secure-patching-bootloader_DISCO-L4R9I_v1.3.0.bin