I am a full-stack Purdue computer engineer, from hardware design to high-level applications.
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norandomtechie/ece270-simulator
norandomtechie/ece270-simulator PublicSource code for Web-Based Verilog Simulation Platform in ECE 27000 at Purdue University
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STARS-Design-Track-2023/Teenage-Mixing-Ninja-Turtles
STARS-Design-Track-2023/Teenage-Mixing-Ninja-Turtles PublicFinal Design Synth
SystemVerilog 1
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