Home didactic, I/O oriented, simple 8-bit BUS-system.
- system containing the schematics and pcb of the xpSimpleBUS system backplane and activity-monitor hardware.
- device containing the schematics and pcb of the xpSimpleBUS devices hardware.
- bridge containing the schematics and pcb of the xpSimpleBUS bridges hardware to interface xpSimpleBUS to a CPU or other BUS systems.
- interface-rpi containing the software and hardware resources to interface xpSimpleBUS to RaspberryPI.
- interface-pic16f6x8 containing the software and hardware resources to interface xpSimpleBUS to PIC16F6x8.
- expresspcb containing the schematic and pcb components used for drawing the layout of xpSimpleBUS boards.
- Power lines :
- +5V
- Gnd
- Address lines :
- A0-A7 - 8-bit Address
- Data lines :
- D0-D7 - 8-bit Data
- Control lines :
- /RD - Read Operation line. "Lo" value indicates the device is being read by the CPU.
- /WR - Write Operation line. "Lo" value indicates the device is being written by the CPU.
Addresses | Assignment |
---|---|
n8H-nFH n=[0,F] | Available |
n0H-n7H n=[0,F] | I/O Device (AL-config) |
System operations are signal based sequence of commands, directed to DEVICEs connected to the xpSimpleBUS, and generated by an external CPU (i.e. connected to the BUS directly or through a bridge board).
- CPU writes and latches Address on BUS
- CPU sets Control Line /WR
- CPU writes Data on BUS
- CPU unsets Control Line /WR
- DEVICE latches Data from BUS
- CPU writes and latches Address on BUS
- CPU sets Control Line /RD
- DEVICE writes Data on BUS
- CPU reads Data from BUS
- CPU unsets Control Line /RD
- DEVICE releases BUS
- Schematics and PCB layouts are designed with ExpressPCB free CAD software.
- simplebus-backplane-4 - backplane with 4+1 slots.
- simplebus-bus-expansion - 2-slot bus expansion.
- simplebus-activity-monitor - test board for bus pins activity.
The Bridge boards are designed to interface the xpSimpleBUS system to a CPU or other kind of BUS systems.
- simplebus-bridge-admux - bridge board to connect the xpSimpleBUS to an external BUS with multiplexed address and data lines.
In order not to increase the complexity and size of the i/o pcbs, only the address pins A0A1A2A3 are scanned to enable the device, with pin A3 always high. Then the device responds also to addresses n0H-n7H, with n in 0..F.
- simplebus-device-input-port - 8-bit input port with selectable address (by a 8-jumper row) in a range of 00H-07H.
- simplebus-device-output-port - 8-bit latched output port with selectable address (by a 8-jumper row) in a range of 00H-07H.
- simplebus-device-sram-128bytes - 128x8-Bytes Static RAM.
- Add more xpSimpleBUS boards and specs
- Implement xpSimpleBUS based projects
Author : Alessandro Fraschetti (mail: gos95@gommagomma.net)
The MIT license posted in the main repository directory is applied to all the xpSimpleBUS's stuff and ExpressPCB custom components library. You are free to use them for any purpose, just try to give credit in the documentation of your project.
This is a home didactic project. If you have any questions, hints or comments please submit an issue with your question/hint/comment and I will get back to you as soon as I can.