v0.1.1 - add soft timer and interrupt enable/disable

README.md

@@ -1,6 +1,6 @@
 # multizone-api
 # Copyright(C) 2018 Hex Five Security, Inc. - All Rights Reserved
-MultiZone Security API
+MultiZone Security API v0.1.1
 
 The design point of the MultiZone nanoKernel is to be minimalist - additional services can be built into Zones as needed.
 
@@ -11,8 +11,11 @@ The API definition is:
 |ECALL_YIELD|`void ECALL_YIELD();`<br> Indicates to the nanoKernel scheduler that the Zone has nothing pressing to do and causes the nanoKernel to immediately move to the next Zone in context.| `ECALL_YIELD();`<br>In the case of a three zone implementation with a tick time of 10ms, the maximum time to come back to context is 20ms, faster if the other zones Yield as well.|
 |ECALL_SEND|`void ECALL_SEND([Zone #], [0-3][Int]);`<br> Send transmits a message from the current zone to the [Zone #]; the message size is an array of [4] integers and the nanoKernel manages transmission with no shared memory.|`ECALL_SEND(1, {201, 0, 0 ,0});`<br>Sends an array to Zone 1 of {201, 0, 0, 0}|
 |ECALL_RECV|`void ECALL_RECV[Zone #], [0-3][int]);`<br>Checks the mailbox of the current Zone for a message from the listed Zone #, if a message exists it copies it to the array structure provided.|	`int msg[4]={0,0,0,0};`<br>`ECALL_RECV(1, msg);`<br>If a message exists in the mailbox from zone 1, it copies it to msg, otherwise msg value is unchanged.|
+|ECALL_CSRS_MIE|`void ECALL_CSRS_MIE();`<br>Secure user-mode emulation of the Machine Status Register (mstatus) MIE bit. Enables all interrupts (PLIC + CLINT) mapped to the zone including the soft timer (trap 0x3). The operation is atomic with respect to the context of the zone.| `ECALL_CSRS_MIE();`|
+|ECALL_CSRC_MIE|`void ECALL_CSRC_MIE();`<br>Secure user-mode emulation of the Machine Status Register (mstatus) MIE bit. Disables all interrupts (PLIC + CLINT) mapped to the zone including the soft timer (trap 0x3). The operation is atomic with respect to the context of the zone.| `ECALL_CSRC_MIE();`|
 |ECALL_TRP_VECT	|`void ECALL_TRP_VECT([Exception Code], [Trap Handler])`<br>Registers a handler against a trap generated by anauthorized instructions; the TRAP #s are defined in the RISC-V Privileged Architectures definition V1.1, Table 3.6 Interrupt 0 types. https://riscv.org/specifications/privileged-isa/ |`ECALL_TRP_VECT(0x0, trap_0x0_handler);`<br>Where trap_0x0_handler is registered at the User level of privilege with:<br>`Void trap_0x0_handler(void)__attribute__((interrupt("user")));`<br>`void trap_0x0_handler(void){`<br>`     // Your handler code here`<br>`}`|
 |ECALL_IRQ_VECT	|`void ECALL_IRQ_VECT([Interrupt #], [Trap Handler])`<br>Registers a handler for an interrupt that has been assigned to a Zone in the multizone.cfg file. <br> When an interrupt occurs, the nanoKernel will immediately pull the zone assigned to that interrupt into context and execute the registered interrupt handler.	|`ECALL_IRQ_VECT(11, button_0_handler);`<br>Where button_0_handler is a registered at the user level of privilege with:<br>`void button_1_handler(void)__attribute__((interrupt("user")));`<br>`void button_1_handler(void){`<br>`  // interrupt handler here`<br>`}`|
+|ECALL_CSRW_MTIMECMP	|`void ECALL_CSRW_MTIMECMP(uint64_t)`<br>Secure user-mode emulation of the machine-mode timer compare register (mtimecmp). Causes a trap 0x3 exception when the mtime register contains a value greater than or equal to the value assigned. Each zone has its own secure instance of timer and trap handler. Per RISC-V specs this is a one-shot timer: once set it will execute its callback function only once. Note that mtime and mtimecmp size is 64-bit even on rv32 architecture. Registering the trap 0x3 handler sets the value of mtimecmp to zero to prevent spurious interrupts. If the timer is set but no handler is registered the exception is ignored.	| `#include <libhexfive.h>` <br> `...` <br> <br> `void trap_0x3_handler(void)__attribute__((interrupt("user")));` <br> `void trap_0x3_handler(void){` <br>   `// do something `<br>`	// restart the timer` <br>`	uint64_t T = 10; // ms `<br>`	uint64_t T0 = ECALL_CSRR_MTIME();` <br>	`uint64_t T1 = T0 + T*32768/1000; `<br>` 	ECALL_CSRR_MTIMECMP(T1); `<br> <br> `} `<br> `...` <br> `main () { `<br> `ECALL_TRP_VECT(0x3, trap_0x3_handler); // register 0x3 Soft timer `<br>	`while(1){` <br> `	// do many things `<br>	`} `<br>` } `<br>
 |ECALL_CSRR_MTIME()|`Int64 ECALL_CSRR_MTIME()`<br>	Returns MTIME to a variable in a zone, MTIME is a privileged registered normally only available in M mode.	|`Int64 mtime = ECALL_CSRR_MTIME();`|
 |ECALL_CSRR_MCYCLE()|`Int64 ECALL_CSRR_MCYCLE()`<br>	Returns MCYCLE to a variable in a zone, MCYCLE is a privileged registered normally only available in M mode.	|`Int64 mcycle = ECALL_CSRR_MCYCLE();`
 |ECALL_CSRR_MINSTR()|`Int64 ECALL_CSRR_MINSTR()`<br>	Returns MINSTR to a variable in a zone, MINSTR is a privileged registered normally only available in M mode.	|`Int64 minstr = ECALL_CSRR_MINSTR();`