Name		Name	Last commit message	Last commit date
parent directory ..
expected		expected
README.md		README.md
calc_factorial.asm		calc_factorial.asm
calc_primes.asm		calc_primes.asm
from_clang1.asm		from_clang1.asm
matrix_mul.asm		matrix_mul.asm
matrix_mul_from_clang.asm_		matrix_mul_from_clang.asm_
prime_numbers_cpp.asm		prime_numbers_cpp.asm
sieve_eratosthenes.asm		sieve_eratosthenes.asm
simple_float_mul.asm		simple_float_mul.asm
sum_ints.asm		sum_ints.asm
sum_ints_from_unified_source.asm		sum_ints_from_unified_source.asm
test_addi.asm		test_addi.asm
test_branch.asm		test_branch.asm
test_divu_modu_mul.asm		test_divu_modu_mul.asm
test_float_add_mul.asm		test_float_add_mul.asm
test_float_load_store.asm		test_float_load_store.asm
test_li.asm		test_li.asm
test_li_float.asm		test_li_float.asm
test_load_store.asm		test_load_store.asm
test_lui_auipc.asm		test_lui_auipc.asm
test_mul.asm		test_mul.asm
test_opimm.asm		test_opimm.asm
test_ops.asm		test_ops.asm
test_out.asm		test_out.asm

README.md

Direct examples

These examples are assembler code that can be run directly on a single core, as though that core was a CPU.

They are written primarily in RISCV-32 assembler. There are some exotic pseudoinstructions used such as OUTR, OUTR.S and HALT.

Exotic pseudoinstructions used:

OUTR: sends the value of an unsigned integer from a register to some kind of console (via writing to memory location 1000)
OUTR.S, as for OUTR, but treats the register as containing a 32-bit float
HALT: halts the core

You can run these examples by using python run.py [name], e.g.:

python run.py sum_ints