[x86] Prevent 0x82 from being considered when running in long mode fo…

…r lockable instructions.
icicle-emu · May 31, 2023 · 6954344 · 6954344
1 parent a0b78c2
commit 6954344
Showing 1 changed file with 7 additions and 7 deletions.
diff --git a/Ghidra/Processors/x86/data/languages/lockable.sinc b/Ghidra/Processors/x86/data/languages/lockable.sinc
@@ -4,7 +4,7 @@
 #     is used with any instruction not in the above list.
 # The instructions in this file have their non-lockable counterparts in ia.sinc
 
-:ADC^lockx spec_m8,imm8		is vexMode=0 & lockx & unlock & (byte=0x80 | byte=0x82); spec_m8 & reg_opcode=2 ... ; imm8 
+:ADC^lockx spec_m8,imm8		is vexMode=0 & lockx & unlock & $(BYTE_80_82); spec_m8 & reg_opcode=2 ... ; imm8 
 { 
     build lockx; 
     build spec_m8;
@@ -109,7 +109,7 @@
 }
 @endif
 
-:ADD^lockx spec_m8,imm8		is vexMode=0 & lockx & unlock & (byte=0x80 | byte=0x82); spec_m8 & reg_opcode=0 ...; imm8		
+:ADD^lockx spec_m8,imm8		is vexMode=0 & lockx & unlock & $(BYTE_80_82); spec_m8 & reg_opcode=0 ...; imm8		
 {
     build lockx;
     build spec_m8;
@@ -225,7 +225,7 @@
 }
 @endif
 
-:AND^lockx m8,imm8      is vexMode=0 & lockx & unlock & (byte=0x80 | byte=0x82); m8 & reg_opcode=4 ...; imm8     
+:AND^lockx m8,imm8      is vexMode=0 & lockx & unlock & $(BYTE_80_82); m8 & reg_opcode=4 ...; imm8     
 {
     build lockx;
     build m8;
@@ -827,7 +827,7 @@
 }
 @endif
 
-:OR^lockx  spec_m8,imm8      is vexMode=0 & lockx & unlock & (byte=0x80 | byte=0x82); spec_m8 & reg_opcode=1 ...; imm8     
+:OR^lockx  spec_m8,imm8      is vexMode=0 & lockx & unlock & $(BYTE_80_82); spec_m8 & reg_opcode=1 ...; imm8     
 {
     build lockx;
     build spec_m8;
@@ -944,7 +944,7 @@
 }
 @endif
 
-:SBB^lockx  m8,imm8     is vexMode=0 & lockx & unlock & (byte=0x80 | byte=0x82); m8 & reg_opcode=3 ...; imm8								
+:SBB^lockx  m8,imm8     is vexMode=0 & lockx & unlock & $(BYTE_80_82); m8 & reg_opcode=3 ...; imm8								
 {
     build lockx;
     build m8;
@@ -1049,7 +1049,7 @@
 }
 @endif
 
-:SUB^lockx  spec_m8,imm8     is vexMode=0 & lockx & unlock & (byte=0x80 | byte=0x82); spec_m8 & reg_opcode=5 ...; imm8     
+:SUB^lockx  spec_m8,imm8     is vexMode=0 & lockx & unlock & $(BYTE_80_82); spec_m8 & reg_opcode=5 ...; imm8     
 {
     build lockx;
     build spec_m8;
@@ -1263,7 +1263,7 @@
 }
 @endif
 
-:XOR^lockx spec_m8,imm8      is vexMode=0 & lockx & unlock & (byte=0x80 | byte=0x82); spec_m8 & reg_opcode=6 ...; imm8     
+:XOR^lockx spec_m8,imm8      is vexMode=0 & lockx & unlock & $(BYTE_80_82); spec_m8 & reg_opcode=6 ...; imm8     
 {
     build lockx;
     build spec_m8;