Implement register_view_catalog

RELEASENOTES.md

@@ -192,3 +192,7 @@
   (equivalent to `ATOM_list_end(0)`) (fixes SIMICS-22363).
 - `release 6 6336`
 - `release 7 7045`
+- `note 6` Added the new `register_view_catalog` interface to all banks. This speeds up
+  various operations that rely on the `register_view` interface, such as the
+  `dev_util.bank_regs` function and the `write-device-reg` and `probe-address`
+  CLI commands.

doc/1.4/language.md

@@ -338,8 +338,8 @@ A *register bank* (or simply *bank*) is an abstraction that is used to
 group *registers* in DML, and to expose these to the outside
 world. Registers are exposed to the rest of the simulated system
 through the Simics interface `io_memory`, and exposed to scripting and
-user interfaces through the `register_view`, `register_view_read_only`
-and `bank_instrumentation_subscribe` Simics interfaces.
+user interfaces through the `register_view`, `register_view_read_only`,
+`register_view_catalog` and `bank_instrumentation_subscribe` Simics interfaces.
 
 It is possible to define *bank arrays* to model a row of similar banks. Each
 element in the bank array is a separate configuration object in Simics, and can

lib/1.2/dml-builtins.dml

@@ -1112,6 +1112,36 @@ template bank {
                 SIM_attr_free(&args);
             }
         }
+        implement register_view_catalog {
+            method register_names() -> (attr_value_t ret) {
+                local uint64 table_size;
+                call $register_view.number_of_registers() -> (table_size);
+                ret = SIM_alloc_attr_list(table_size);
+                local int i;
+                for (i = 0; i < table_size; i++) {
+                    local attr_value_t full_info
+                        = $register_view.register_info(i);
+                    SIM_attr_list_set_item(
+                        &ret, i,
+                        SIM_attr_copy(SIM_attr_list_item(full_info, 0)));
+                    SIM_attr_free(&full_info);
+                }
+            }
+            method register_offsets() -> (attr_value_t ret) {
+                local uint64 table_size;
+                call $register_view.number_of_registers() -> (table_size);
+                ret = SIM_alloc_attr_list(table_size);
+                local int i;
+                for (i = 0; i < table_size; i++) {
+                    local attr_value_t full_info
+                        = $register_view.register_info(i);
+                    SIM_attr_list_set_item(
+                        &ret, i,
+                        SIM_attr_copy(SIM_attr_list_item(full_info, 3)));
+                    SIM_attr_free(&full_info);
+                }
+            }
+        }
     }
 }
 

lib/1.4/dml-builtins.dml

@@ -2622,6 +2622,29 @@ template bank is (object, shown_desc) {
         }
     }
 
+    implement register_view_catalog {
+        method register_names() -> (attr_value_t) {
+            local (const register *table, uint64 table_size) = _reginfo_table();
+            local attr_value_t ret = SIM_alloc_attr_list(table_size);
+            local size_t bank_prefix_len = strlen(bank._qname()) + 1;
+            for (local int i = 0; i < table_size; i++) {
+                SIM_attr_list_set_item(
+                    &ret, i, SIM_make_attr_string(
+                        table[i]._qname() + bank_prefix_len));
+            }
+            return ret;
+        }
+        method register_offsets() -> (attr_value_t) {
+            local (const register *table, uint64 table_size) = _reginfo_table();
+            local attr_value_t ret = SIM_alloc_attr_list(table_size);
+            for (local int i = 0; i < table_size; i++) {
+                SIM_attr_list_set_item(
+                    &ret, i, SIM_make_attr_uint64(table[i].offset));
+            }
+            return ret;
+        }
+    }
+
     // TODO: we should implement int_register automatically; define a dummy
     // parameter to reserve the name
     param int_register = undefined;

test/common/test_register_view.py

@@ -41,8 +41,10 @@ def test_register_value(bank, register):
     expect_equal(bank.get_register_value(0), 0x01020304)
 
 def test_array_names(bg):
+    regnames = [bg.iface.register_view.register_info(i)[0]
+                for i in range(bg.iface.register_view.number_of_registers())]
     expect_equal(
-        sorted([bg.register_info(i)[0] for i in range(0, bg.number_of_registers())]),
+        sorted(regnames),
         ['g[0].h.i[0].r',
          'g[0].h.i[0].rma[0][0]',
          'g[0].h.i[0].rma[0][1]',
@@ -71,6 +73,11 @@ def test_array_names(bg):
          'g[1].h.i[1].rma[1][1]',
          'g[1].h.i[1].ru[0]',
          'g[1].h.i[1].ru[2]'])
+    expect_equal(bg.iface.register_view_catalog.register_names(), regnames)
+    expect_equal(
+        bg.iface.register_view_catalog.register_offsets(),
+        [bg.iface.register_view.register_info(i)[3]
+         for i in range(bg.iface.register_view.number_of_registers())])
 
 def test(obj):
     test_description(obj.bank.b.iface.register_view, "Description for b")
@@ -90,7 +97,7 @@ def test(obj):
     test_register_info(obj.bank.baa[1][1].iface.register_view)
     test_register_info(obj.bank.u.iface.register_view)
 
-    test_array_names(obj.bank.bg.iface.register_view)
+    test_array_names(obj.bank.bg)
 
     test_register_value(obj.bank.le.iface.register_view,
                         dev_util.Register_LE(obj.bank.le, 0x0, 4))