From 58337627873a39c263563db6e88efe557e560d17 Mon Sep 17 00:00:00 2001 From: "Tiotto, Ettore" Date: Wed, 22 May 2024 18:49:10 +0000 Subject: [PATCH] Fix precommit Signed-off-by: Tiotto, Ettore --- test/TritonIntelGPU/prefetch-to-llvm.mlir | 6 +++--- .../intel/lib/TritonIntelGPUToLLVM/LoadStoreOpToLLVM.cpp | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/test/TritonIntelGPU/prefetch-to-llvm.mlir b/test/TritonIntelGPU/prefetch-to-llvm.mlir index fcf8c1e7ef..98c051826c 100644 --- a/test/TritonIntelGPU/prefetch-to-llvm.mlir +++ b/test/TritonIntelGPU/prefetch-to-llvm.mlir @@ -10,9 +10,9 @@ #dot1 = #triton_gpu.dot_op<{opIdx = 1, parent = #dpas, kWidth = 2}> module attributes {"triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-warp" = 16 : i32} { tt.func public @matmul_with_prefetch(%arg0: !tt.ptr, %arg1: !tt.ptr, %arg2: tensor<32x32x!tt.ptr, #blocked>, %arg3: i64, %arg4: i64, %arg5: i64, %arg6: i64, %arg7: i64) { - // CHECK-LABEL: @matmul_with_prefetch + // CHECK-LABEL: @matmul_with_prefetch // CHECK-COUNT-2: llvm.call @llvm.genx.GenISA.LSC2DBlockPrefetch.isVoid{{.*}} -> () - // CHECK-COUNT-1: llvm.call @llvm.genx.GenISA.LSC2DBlockRead.v8i16{{.*}} -> vector<8xi16> + // CHECK-COUNT-1: llvm.call @llvm.genx.GenISA.LSC2DBlockRead.v8i16{{.*}} -> vector<8xi16> // CHECK-COUNT-1: llvm.call @llvm.genx.GenISA.LSC2DBlockRead.v8i32{{.*}} -> vector<8xi32> // CHECK-COUNT-1: llvm.call @_Z38intel_sub_group_f16_f16_matrix_mad_k16Dv8_sDv8_iDv8_f({{.*}}) {passthrough = ["convergent"]} : (vector<8xi16>, vector<8xi32>, vector<8xf32>) -> vector<8xf32> %cst = arith.constant dense<0.000000e+00> : tensor<32x32xf32, #dpas> @@ -28,4 +28,4 @@ module attributes {"triton_gpu.num-warps" = 8 : i32, "triton_gpu.threads-per-war %12 = triton_gpu.convert_layout %11 {allocation.offset = 0 : i32} : tensor<32x32xf32, #dpas> -> tensor<32x32xf32, #blocked> tt.return } -} \ No newline at end of file +} diff --git a/third_party/intel/lib/TritonIntelGPUToLLVM/LoadStoreOpToLLVM.cpp b/third_party/intel/lib/TritonIntelGPUToLLVM/LoadStoreOpToLLVM.cpp index 9a1f6e115d..a064892879 100644 --- a/third_party/intel/lib/TritonIntelGPUToLLVM/LoadStoreOpToLLVM.cpp +++ b/third_party/intel/lib/TritonIntelGPUToLLVM/LoadStoreOpToLLVM.cpp @@ -186,7 +186,7 @@ struct PrefetchOpConversion if (isTensorPointerType(ptr.getType())) return rewriteTensorPointerPrefetch(op, adaptor, rewriter); - assert(false && "Unexpected prefetch operation on 'regular' ptr"); + llvm_unreachable("Unexpected prefetch operation on 'regular' ptr"); return failure(); }