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Fix lit test
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quintinwang5 committed May 16, 2024
1 parent 8e91cb5 commit ea8f73a
Showing 1 changed file with 3 additions and 1 deletion.
4 changes: 3 additions & 1 deletion test/TritonGEN/tritongen-to-llvm.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -232,9 +232,11 @@ llvm.func @triton_gen.2Dblockload(%ptr : !llvm.ptr<1>, %base_width : i32, %base_
// CHECK-NEXT: [[COORD0:%.*]] = llvm.insertelement %arg4, [[UNDEF]][[[ZERO]] : i32] : vector<2xi32>
// CHECK-NEXT: [[COORD1:%.*]] = llvm.insertelement %arg5, [[COORD0]][[[ONE]] : i32] : vector<2xi32>
// CHECK: [[WIDTH:%.*]] = llvm.trunc %arg1 : i32 to i32
// CHECK: [[MUL:%.*]] = llvm.mul [[WIDTH]], {{.*}} : i32
// CHECK: [[HEIGHT:%.*]] = llvm.trunc %arg2 : i32 to i32
// CHECK: [[PITCH:%.*]] = llvm.trunc %arg3 : i32 to i32
// CHECK-NEXT: llvm.call @intel_subgroup_block_read_u8_m8k32v2(%arg0, [[WIDTH]], [[HEIGHT]], [[PITCH]], [[COORD1]]) {passthrough = ["convergent"]} : (!llvm.ptr<1>, i32, i32, i32, vector<2xi32>) -> vector<16xi16>
// CHECK: [[MUL_1:%.*]] = llvm.mul [[PITCH]], {{.*}} : i32
// CHECK-NEXT: llvm.call @intel_subgroup_block_read_u8_m8k32v2(%arg0, [[MUL]], [[HEIGHT]], [[MUL_1]], [[COORD1]]) {passthrough = ["convergent"]} : (!llvm.ptr<1>, i32, i32, i32, vector<2xi32>) -> vector<16xi16>
%0 = triton_gen.2Dblockload %ptr, %base_width, %base_height, %base_pitch, %x, %y {elem_size_in_bits=8, tile_width=32, tile_height=8, v_blocks=2, transpose=false, vnni_transform=false, cache_control=Default} : (!llvm.ptr<1>, i32, i32, i32, i32, i32) -> vector<16xi16>
llvm.return
}
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