Finite thickness for conductors with non-PEC

[WorkQuoh]

So, when I run a simulation, and I want to consider a finite thickness for my metal layer with a certain conductivity, I get an error. For example, if you run a simulation for xs1_full_chip_sim.py but you consider a finite thickness instead of a sheet with 0 thickness and you consider a material with a certain conductivity instead of a PEC. I get the following error:

[error] Port refinement, process hf3d error: Too few conductors were found on port 1. There should be one conductor for each terminal, with one additional reference conductor. Unintentional contact between conductors may cause this error.

The simulation runs in the first case with zero thickness and PEC. But when you make it have a finite thickness and don't consider it as a PEC you get the error? I am not sure why? The error message if a bit confusing to me since the ports should be the same in both case unless I am missing something.

This is probably a question for the ANSYS HFSS forum, but I was just wondering if anyone else ran into this error as well.

[jukkarabina]

The KQCircuits simulation export does not fully support finite conductivity (non-PEC) metals at the moment. You can enable finite conductivity by changing metal materials in Ansys Electronics Desktop GUI. Remember to enable solve-inside.

The finite thickness PEC feature is available in KQCircuits, but if you are using relatively very thin metal thickness, the Ansys simulation will most likely fail into some error, because the aspect ratio of mesh elements becomes too large. This is a known issue in Ansys. I'm not sure if your error is due to this or is there some other problem with the model.

In the case of very thin metals, it's recommended to model them as sheets (giving artificial thickness for the sheet). I guess it should be possible in Ansys. Hopefully this answer helps.