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Jaime Dantas edited this page Jan 30, 2017 · 3 revisions

Reaction Timer for FPGA

This project mensures the time reaction of a human being in a Field-Programmable Gate Array (FPGA). When it initializes, a LED sinalizes the event and as soon as the LED goes off, the timer starts.

##Altera FPGA

All the code was made in low level and all the operations were implemented in VHDL. Also, a processor was created to execute the instructions. The figure below shows the block diagram of the project.

The finite state machine is shown in the figure below.

https://www.youtube.com/watch?v=eJSUn5-c7A4

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