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Migarte ZSWatch board to Zephyr HW Model V2.
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jakkra committed Dec 15, 2024
1 parent 0e811d1 commit bcaec20
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Showing 40 changed files with 196 additions and 249 deletions.
2 changes: 1 addition & 1 deletion .github/workflows/build.yml
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ jobs:
strategy:
matrix:
built_type: [debug, release]
board: [zswatch_nrf5340_cpuapp@3, zswatch_nrf5340_cpuapp@4, zswatch_nrf5340_cpuapp@5, native_posix, nrf5340dk_nrf5340_cpuapp]
board: [zswatch@3/nrf5340/cpuapp, zswatch@4/nrf5340/cpuapp, zswatch@5/nrf5340/cpuapp, native_posix/native, nrf5340dk/nrf5340/cpuapp]
steps:
- name: Checkout
uses: actions/checkout@v4
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10 changes: 6 additions & 4 deletions app/CMakeLists.txt
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Expand Up @@ -15,10 +15,10 @@ foreach(file ${files})
endforeach()

# Get the target hardware
string(REGEX MATCH "zswatch_nrf5340_cpuapp(_ns)?@([0-9]+)$" ZSWATCH_BOARD "${BOARD}")
string(REGEX MATCH "zswatch@([0-9]+)/nrf5340.*" ZSWATCH_BOARD "${BOARD}")
if(ZSWATCH_BOARD)
string(CONCAT VERSION_STRING "\"" ${CMAKE_MATCH_2} "\"")
set(CONFIG_ZSWATCH_PCB_REV ${CMAKE_MATCH_2} CACHE INTERNAL "")
string(CONCAT VERSION_STRING "\"" ${CMAKE_MATCH_1} "\"")
set(CONFIG_ZSWATCH_PCB_REV ${CMAKE_MATCH_1} CACHE INTERNAL "")
set(CONFIG_BT_DIS_HW_REV_STR ${VERSION_STRING} CACHE INTERNAL "")

message("PCB revision: " ${CONFIG_ZSWATCH_PCB_REV})
Expand All @@ -28,8 +28,10 @@ if(ZSWATCH_BOARD)
else()
set(PM_STATIC_YML_FILE ${CMAKE_CURRENT_SOURCE_DIR}/partition_internal.yml)
endif()
elseif("nrf5340dk_nrf5340_cpuapp" STREQUAL "${BOARD}")
elseif("nrf5340dk/nrf5340/cpuapp" STREQUAL "${BOARD}")
set(PM_STATIC_YML_FILE ${CMAKE_CURRENT_SOURCE_DIR}/partition_external.yml)
else()
message(WARNING "Not supported board: ${BOARD}. Build may not work.")
endif()

if(CONFIG_BOOTLOADER_MCUBOOT)
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7 changes: 0 additions & 7 deletions app/boards/arm/zswatch_nrf5340/CMakeLists.txt

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21 changes: 0 additions & 21 deletions app/boards/arm/zswatch_nrf5340/Kconfig.board

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77 changes: 0 additions & 77 deletions app/boards/arm/zswatch_nrf5340/board.c

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1 change: 0 additions & 1 deletion app/boards/arm/zswatch_nrf5340/revision.cmake

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15 changes: 15 additions & 0 deletions app/boards/jakkra/zswatch/CMakeLists.txt
Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
# Copyright (c) 2019 Nordic Semiconductor ASA.
# SPDX-License-Identifier: Apache-2.0

if ((CONFIG_BOARD_ZSWATCH_NRF5340_CPUAPP OR CONFIG_BOARD_ZSWATCH_NRF5340_CPUAPP_NS)
AND CONFIG_BOARD_ENABLE_CPUNET)
zephyr_library()
zephyr_library_sources(nrf5340_cpunet_reset.c)

if (CONFIG_BUILD_WITH_TFM)
zephyr_library_include_directories(
$<TARGET_PROPERTY:tfm,TFM_BINARY_DIR>/api_ns/interface/include
)
endif()

endif()
Original file line number Diff line number Diff line change
@@ -1,17 +1,8 @@
# ZSWwatch NRF5340 board configuration
# nRF5340 DK board configuration

# Copyright (c) 2023 Jakob Krantz
# Copyright (c) 2019 - 2021 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

config ZSWATCH_INIT_PRIORITY
int "Init priority"
default 79
help
Initialization priority of the ZSWatch

config MBOX_NRFX_IPC
default MBOX

if BOARD_ZSWATCH_NRF5340_CPUAPP || BOARD_ZSWATCH_NRF5340_CPUAPP_NS

config BOARD_ENABLE_DCDC_APP
Expand Down Expand Up @@ -47,24 +38,21 @@ config BOARD_ENABLE_CPUNET

config DOMAIN_CPUNET_BOARD
string
default "zswatch_nrf5340_cpunet"
default "zswatch/nrf5340/cpunet"
depends on BOARD_ENABLE_CPUNET
help
The board which will be used for CPUNET domain when creating a multi
image application where one or more images should be located on
another board. For example hci_rpmsg on the nRF5340_cpunet for
another board. For example hci_ipc on the nRF5340_cpunet for
Bluetooth applications.

endif # BOARD_ZSWATCH_NRF5340_CPUAPP || BOARD_ZSWATCH_NRF5340_CPUAPP_NS

if BOARD_ZSWATCH_NRF5340_CPUNET
endif # BOARD_ZSWATCH_NRF5340_CPUAPP || BOARD_ZSWATCH_NRF5340_CPUAPP_NS

config DOMAIN_CPUAPP_BOARD
string
default "zswatch_nrf5340_cpuapp"
default "zswatch/nrf5340/cpuapp"
depends on BOARD_ZSWATCH_NRF5340_CPUNET
help
The board which will be used for CPUAPP domain when creating a multi
image application where one or more images should be located on
another board.

endif # BOARD_ZSWATCH_NRF5340_CPUNET
Original file line number Diff line number Diff line change
@@ -1,27 +1,9 @@
# ZSWatch NRF5340 board configuration
# nRF5340 DK nRF5340 board configuration

# Copyright (c) 2023 Jakob Krantz
# Copyright (c) 2019-2020 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0

if BOARD_ZSWATCH_NRF5340_CPUAPP || BOARD_ZSWATCH_NRF5340_CPUAPP_NS

config BOARD
default "zswatch_nrf5340_cpuapp"

# By default, if we build for a Non-Secure version of the board,
# enable building with TF-M as the Secure Execution Environment.
config BUILD_WITH_TFM
default y if BOARD_ZSWATCH_NRF5340_CPUAPP_NS

if BUILD_WITH_TFM

# By default, if we build with TF-M, instruct build system to
# flash the combined TF-M (Secure) & Zephyr (Non Secure) image
config TFM_FLASH_MERGED_BINARY
bool
default y

endif # BUILD_WITH_TFM
if BOARD_ZSWATCH_NRF5340_CPUAPP || BOARD_ZSWATCH_NRF5340_CPUAPP_NS

# Code Partition:
#
Expand Down Expand Up @@ -71,43 +53,26 @@ config FLASH_LOAD_SIZE

endif # BOARD_ZSWATCH_NRF5340_CPUAPP_NS

if !TRUSTED_EXECUTION_SECURE
endif # BOARD_ZSWATCH_NRF5340_CPUAPP || BOARD_ZSWATCH_NRF5340_CPUAPP_NS

config MBOX_NRFX_IPC
default MBOX

if BOARD_ZSWATCH_NRF5340_CPUAPP || BOARD_ZSWATCH_NRF5340_CPUAPP_NS

choice BT_HCI_BUS_TYPE
default BT_HCI_IPC if BT
endchoice

config HEAP_MEM_POOL_SIZE
config HEAP_MEM_POOL_ADD_SIZE_BOARD
int
default 4096 if BT_HCI_IPC

config BT_HAS_HCI_VS
default BT

config USB_NRFX_ATTACHED_EVENT_DELAY
default 700 if USB_DEVICE_DRIVER

config I2C
default y

config SPI
default y

config REGULATOR
default y

endif # !TRUSTED_EXECUTION_SECURE

endif # BOARD_ZSWATCH_NRF5340_CPUAPP || BOARD_ZSWATCH_NRF5340_CPUAPP_NS
endif # BOARD_ZSWATCH_NRF5340_CPUAPP || BOARD_ZSWATCH_NRF5340_CPUAPP_NS

if BOARD_ZSWATCH_NRF5340_CPUNET

config BOARD
default "zswatch_nrf5340_cpunet"

config BT_CTLR
default BT

config BT_ECC
default BT
default y if BT

endif # BOARD_ZSWATCH_NRF5340_CPUNET
7 changes: 7 additions & 0 deletions app/boards/jakkra/zswatch/Kconfig.zswatch
Original file line number Diff line number Diff line change
@@ -0,0 +1,7 @@
# Copyright (c) 2022 Zephyr Project members and individual contributors
# SPDX-License-Identifier: Apache-2.0

config BOARD_ZSWATCH
select SOC_NRF5340_CPUAPP_QKAA if BOARD_ZSWATCH_NRF5340_CPUAPP
select SOC_NRF5340_CPUAPP_QKAA if BOARD_ZSWATCH_NRF5340_CPUAPP_NS
select SOC_NRF5340_CPUNET_QKAA if BOARD_ZSWATCH_NRF5340_CPUNET
Original file line number Diff line number Diff line change
@@ -1,12 +1,21 @@
# SPDX-License-Identifier: Apache-2.0

if(CONFIG_BOARD_ZSWATCH_NRF5340_CPUAPP_NS)
set(TFM_PUBLIC_KEY_FORMAT "full")
endif()

if(CONFIG_BOARD_ZSWATCH_NRF5340_CPUAPP OR CONFIG_BOARD_ZSWATCH_NRF5340_CPUAPP_NS)
board_runner_args(jlink "--device=nrf5340_xxaa_app" "--speed=4000")
endif()

if(CONFIG_TFM_FLASH_MERGED_BINARY)
set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
endif()

if(CONFIG_BOARD_ZSWATCH_NRF5340_CPUNET)
board_runner_args(jlink "--device=nrf5340_xxaa_net" "--speed=4000")
endif()

include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
14 changes: 14 additions & 0 deletions app/boards/jakkra/zswatch/board.yml
Original file line number Diff line number Diff line change
@@ -0,0 +1,14 @@
board:
name: zswatch
vendor: nordic
socs:
- name: 'nrf5340'
variants:
- name: 'ns'
cpucluster: 'cpuapp'
revision:
format: number
default: "5"
exact: false
revisions:
- name: "5"
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
* SPDX-License-Identifier: Apache-2.0
*/

&pinctrl {
&pinctrl {
pwm0_default: pwm0_default {
group1 {
psels = <NRF_PSEL(PWM_OUT0, 0, 6)>;
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Original file line number Diff line number Diff line change
Expand Up @@ -3,9 +3,10 @@
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "zswatch_nrf5340_common-pinctrl.dtsi"
#include "nrf5340_cpuapp_common-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>


/ {
chosen {
zephyr,console = &uart0;
Expand Down Expand Up @@ -261,4 +262,4 @@ zephyr_udc0: &usbd {
};

/* Include partition configuration file */
#include "zswatch_nrf5340_partition_conf.dts"
#include "nrf5340_cpuapp_partition_conf.dtsi"
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@
* the beginning of the Non-Secure image (not its size).
*/

&slot0_partition {
&slot0_partition {
reg = <0x00010000 0x40000>;
};

Expand Down Expand Up @@ -56,5 +56,6 @@
reg = <0x20040000 0x30000>;
};


/* Include shared RAM configuration file */
#include "zswatch_nrf5340_shared_sram_planning_conf.dts"
#include "nrf5340_shared_sram_planning_conf.dtsi"
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