Computer Architecture using RISC-V

This repository contains descriptions and solution of labs for learning computer architecture using the RISC-V instruction set architecture.

Course Overview

This course covers the fundamentals of computer architecture ( assembly code ), with a focus on the RISC-V instruction set architecture.

Labs

• lab1 : RISC-V assembly code
• lab2 : RISC-V vector extension
• lab3 : cache simulator