forked from decred/gominer
-
Notifications
You must be signed in to change notification settings - Fork 0
/
decred.cu
359 lines (314 loc) · 12.6 KB
/
decred.cu
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
/**
* Blake-256 Decred 180-Bytes input Cuda Kernel (Tested on SM 5/5.2/6.1)
*
* Tanguy Pruvot - Feb 2016
*
* Merged 8-round blake (XVC) tweaks
* Further improved by: ~2.72%
* Alexis Provos - Jun 2016
*/
// nvcc -I. -c decred.cu --ptx
#include <stdint.h>
#include <memory.h>
#include <miner.h>
#if defined(_WIN32)
#define DLLEXPORT __declspec(dllexport)
#else
#define DLLEXPORT
#endif /* _WIN32 */
extern "C" {
#include <sph/sph_blake.h>
}
/* threads per block */
#define TPB 640
/* max count of found nonces in one call (like sgminer) */
#define maxResults 4
/* hash by cpu with blake 256 */
extern "C" void decred_hash(void *output, const void *input)
{
sph_blake256_context ctx;
sph_blake256_set_rounds(14);
sph_blake256_init(&ctx);
sph_blake256(&ctx, input, 180);
sph_blake256_close(&ctx, output);
}
#include <cuda_helper.h>
#ifdef __INTELLISENSE__
#define __byte_perm(x, y, b) x
#define atomicInc(p, max) (*p)++
#endif
__constant__ uint32_t _ALIGN(16) c_h[2];
__constant__ uint32_t _ALIGN(16) c_data[32];
__constant__ uint32_t _ALIGN(16) c_xors[215];
#define ROR8(a) __byte_perm(a, 0, 0x0321)
#define ROL16(a) __byte_perm(a, 0, 0x1032)
/* macro bodies */
#define pxorGS(a,b,c,d) { \
v[a]+= c_xors[i++] + v[b]; \
v[d] = ROL16(v[d] ^ v[a]); \
v[c]+= v[d]; \
v[b] = ROTR32(v[b] ^ v[c], 12); \
v[a]+= c_xors[i++] + v[b]; \
v[d] = ROR8(v[d] ^ v[a]); \
v[c]+= v[d]; \
v[b] = ROTR32(v[b] ^ v[c], 7); \
}
#define pxorGS2(a,b,c,d, a1,b1,c1,d1) {\
v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \
v[ d] = ROL16(v[ d] ^ v[ a]); v[d1] = ROL16(v[d1] ^ v[a1]); \
v[ c]+= v[ d]; v[c1]+= v[d1]; \
v[ b] = ROTR32(v[ b] ^ v[ c], 12); v[b1] = ROTR32(v[b1] ^ v[c1], 12); \
v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \
v[ d] = ROR8(v[ d] ^ v[ a]); v[d1] = ROR8(v[d1] ^ v[a1]); \
v[ c]+= v[ d]; v[c1]+= v[d1]; \
v[ b] = ROTR32(v[ b] ^ v[ c], 7); v[b1] = ROTR32(v[b1] ^ v[c1], 7); \
}
#define pxory1GS2(a,b,c,d, a1,b1,c1,d1) { \
v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \
v[ d] = ROL16(v[ d] ^ v[ a]); v[d1] = ROL16(v[d1] ^ v[a1]); \
v[ c]+= v[ d]; v[c1]+= v[d1]; \
v[ b] = ROTR32(v[ b] ^ v[ c], 12); v[b1] = ROTR32(v[b1] ^ v[c1], 12); \
v[ a]+= c_xors[i++] + v[ b]; v[a1]+= (c_xors[i++]^nonce) + v[b1]; \
v[ d] = ROR8(v[ d] ^ v[ a]); v[d1] = ROR8(v[d1] ^ v[a1]); \
v[ c]+= v[ d]; v[c1]+= v[d1]; \
v[ b] = ROTR32(v[ b] ^ v[ c], 7); v[b1] = ROTR32(v[b1] ^ v[c1], 7); \
}
#define pxory0GS2(a,b,c,d, a1,b1,c1,d1) { \
v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \
v[ d] = ROL16(v[ d] ^ v[ a]); v[d1] = ROL16(v[d1] ^ v[a1]); \
v[ c]+= v[ d]; v[c1]+= v[d1]; \
v[ b] = ROTR32(v[ b] ^ v[ c], 12); v[b1] = ROTR32(v[b1] ^ v[c1], 12); \
v[ a]+= (c_xors[i++]^nonce) + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \
v[ d] = ROR8(v[ d] ^ v[ a]); v[d1] = ROR8(v[d1] ^ v[a1]); \
v[ c]+= v[ d]; v[c1]+= v[d1]; \
v[ b] = ROTR32(v[ b] ^ v[ c], 7); v[b1] = ROTR32(v[b1] ^ v[c1], 7); \
}
#define pxorx1GS2(a,b,c,d, a1,b1,c1,d1) { \
v[ a]+= c_xors[i++] + v[ b]; v[a1]+= (c_xors[i++]^nonce) + v[b1]; \
v[ d] = ROL16(v[ d] ^ v[ a]); v[d1] = ROL16(v[d1] ^ v[a1]); \
v[ c]+= v[ d]; v[c1]+= v[d1]; \
v[ b] = ROTR32(v[ b] ^ v[ c], 12); v[b1] = ROTR32(v[b1] ^ v[c1], 12); \
v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \
v[ d] = ROR8(v[ d] ^ v[ a]); v[d1] = ROR8(v[d1] ^ v[a1]); \
v[ c]+= v[ d]; v[c1]+= v[d1]; \
v[ b] = ROTR32(v[ b] ^ v[ c], 7); v[b1] = ROTR32(v[b1] ^ v[c1], 7); \
}
#define pxorx0GS2(a,b,c,d, a1,b1,c1,d1) { \
v[ a]+= (c_xors[i++]^nonce) + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \
v[ d] = ROL16(v[ d] ^ v[ a]); v[d1] = ROL16(v[d1] ^ v[a1]); \
v[ c]+= v[ d]; v[c1]+= v[d1]; \
v[ b] = ROTR32(v[ b] ^ v[ c], 12); v[b1] = ROTR32(v[b1] ^ v[c1], 12); \
v[ a]+= c_xors[i++] + v[ b]; v[a1]+= c_xors[i++] + v[b1]; \
v[ d] = ROR8(v[ d] ^ v[ a]); v[d1] = ROR8(v[d1] ^ v[a1]); \
v[ c]+= v[ d]; v[c1]+= v[d1]; \
v[ b] = ROTR32(v[ b] ^ v[ c], 7); v[b1] = ROTR32(v[b1] ^ v[c1], 7); \
}
extern "C"
{
//__global__ __launch_bounds__(TPB,1)
__global__ void decred_gpu_hash_nonce(const uint32_t threads, const uint32_t startNonce, uint32_t *resNonce, const uint32_t highTarget)
{
const uint32_t thread = blockDim.x * blockIdx.x + threadIdx.x;
if (thread < threads)
{
uint32_t v[16];
#pragma unroll
for(int i=0; i<16; i+=4) {
*(uint4*)&v[i] = *(uint4*)&c_data[i];
}
const uint32_t nonce = startNonce + thread;
v[ 1]+= (nonce ^ 0x13198A2E);
v[13] = ROR8(v[13] ^ v[1]);
v[ 9]+= v[13];
v[ 5] = ROTR32(v[5] ^ v[9], 7);
int i = 0;
v[ 1]+= c_xors[i++];// + v[ 6];
v[ 0]+= v[5];
v[12] = ROL16(v[12] ^ v[ 1]); v[15] = ROL16(v[15] ^ v[ 0]);
v[11]+= v[12]; v[10]+= v[15];
v[ 6] = ROTR32(v[ 6] ^ v[11], 12); v[ 5] = ROTR32(v[5] ^ v[10], 12);
v[ 1]+= c_xors[i++] + v[ 6]; v[ 0]+= c_xors[i++] + v[ 5];
v[12] = ROR8(v[12] ^ v[ 1]); v[15] = ROR8(v[15] ^ v[ 0]);
v[11]+= v[12]; v[10]+= v[15];
v[ 6] = ROTR32(v[ 6] ^ v[11], 7); v[ 5] = ROTR32(v[ 5] ^ v[10], 7);
pxorGS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorGS2( 0, 4, 8, 12, 1, 5, 9, 13); pxorGS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorGS2( 0, 5, 10, 15, 1, 6, 11, 12); pxory1GS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorGS2( 0, 4, 8, 12, 1, 5, 9, 13); pxorGS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorx1GS2( 0, 5, 10, 15, 1, 6, 11, 12); pxorGS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorx1GS2( 0, 4, 8, 12, 1, 5, 9, 13); pxorGS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorGS2( 0, 5, 10, 15, 1, 6, 11, 12); pxorGS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorGS2( 0, 4, 8, 12, 1, 5, 9, 13); pxorGS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorGS2( 0, 5, 10, 15, 1, 6, 11, 12); pxorx1GS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorGS2( 0, 4, 8, 12, 1, 5, 9, 13); pxory1GS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorGS2( 0, 5, 10, 15, 1, 6, 11, 12); pxorGS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorGS2( 0, 4, 8, 12, 1, 5, 9, 13); pxorGS2( 2, 6, 10, 14, 3, 7, 11, 15); pxory1GS2( 0, 5, 10, 15, 1, 6, 11, 12); pxorGS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorGS2( 0, 4, 8, 12, 1, 5, 9, 13); pxorx1GS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorGS2( 0, 5, 10, 15, 1, 6, 11, 12); pxorGS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorGS2( 0, 4, 8, 12, 1, 5, 9, 13); pxory0GS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorGS2( 0, 5, 10, 15, 1, 6, 11, 12); pxorGS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorGS2( 0, 4, 8, 12, 1, 5, 9, 13); pxorGS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorGS2( 0, 5, 10, 15, 1, 6, 11, 12); pxorx0GS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxory1GS2( 0, 4, 8, 12, 1, 5, 9, 13); pxorGS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorGS2( 0, 5, 10, 15, 1, 6, 11, 12); pxorGS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorGS2( 0, 4, 8, 12, 1, 5, 9, 13); pxorGS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorGS2( 0, 5, 10, 15, 1, 6, 11, 12); pxory1GS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorGS2( 0, 4, 8, 12, 1, 5, 9, 13); pxorGS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorx1GS2( 0, 5, 10, 15, 1, 6, 11, 12); pxorGS2( 2, 7, 8, 13, 3, 4, 9, 14);
pxorx1GS2( 0, 4, 8, 12, 1, 5, 9, 13); pxorGS2( 2, 6, 10, 14, 3, 7, 11, 15); pxorGS2( 0, 5, 10, 15, 1, 6, 11, 12); pxorGS( 2, 7, 8, 13);
if ((c_h[1]^v[15]) == v[7]) {
uint32_t pos = atomicInc(&resNonce[0], UINT32_MAX)+1;
resNonce[pos] = nonce;
return;
}
}
}
}
extern "C" {
DLLEXPORT void
decred_hash_nonce(uint32_t grid, uint32_t block, uint32_t threads,
uint32_t startNonce, uint32_t *resNonce, uint32_t targetHigh)
{
decred_gpu_hash_nonce <<<grid, block>>> (threads, startNonce, resNonce, targetHigh);
}
}
extern "C" {
__host__ DLLEXPORT void
decred_cpu_setBlock_52(const uint32_t *input)
{
/*
for (int i = 0; i < 180/4; i++)
printf("%08x", input[i]);
printf("\n");
*/
/*
Precompute everything possible and pass it on constant memory
*/
const uint32_t z[16] = {
0x243F6A88U, 0x85A308D3U, 0x13198A2EU, 0x03707344U,
0xA4093822U, 0x299F31D0U, 0x082EFA98U, 0xEC4E6C89U,
0x452821E6U, 0x38D01377U, 0xBE5466CFU, 0x34E90C6CU,
0xC0AC29B7U, 0xC97C50DDU, 0x3F84D5B5U, 0xB5470917U
};
int i=0;
uint32_t _ALIGN(64) preXOR[215];
uint32_t _ALIGN(64) data[16];
uint32_t _ALIGN(64) m[16];
uint32_t _ALIGN(64) h[ 2];
sph_blake256_context ctx;
sph_blake256_set_rounds(14);
sph_blake256_init(&ctx);
sph_blake256(&ctx, input, 128);
data[ 0] = ctx.H[0];
data[ 1] = ctx.H[1];
data[ 2] = ctx.H[2];
data[ 3] = ctx.H[3];
data[ 4] = ctx.H[4];
data[ 5] = ctx.H[5];
data[ 8] = ctx.H[6];
data[12] = swab32(input[35]);
data[13] = ctx.H[7];
// pre swab32
m[ 0] = swab32(input[32]); m[ 1] = swab32(input[33]);
m[ 2] = swab32(input[34]); m[ 3] = 0;
m[ 4] = swab32(input[36]); m[ 5] = swab32(input[37]);
m[ 6] = swab32(input[38]); m[ 7] = swab32(input[39]);
m[ 8] = swab32(input[40]); m[ 9] = swab32(input[41]);
m[10] = swab32(input[42]); m[11] = swab32(input[43]);
m[12] = swab32(input[44]); m[13] = 0x80000001;
m[14] = 0;
m[15] = 0x000005a0;
h[ 0] = data[ 8];
h[ 1] = data[13];
CUDA_SAFE_CALL(cudaMemcpyToSymbol(c_h,h, 8, 0, cudaMemcpyHostToDevice));
data[ 0]+= (m[ 0] ^ z[1]) + data[ 4];
data[12] = SPH_ROTR32(z[4] ^ SPH_C32(0x5A0) ^ data[ 0], 16);
data[ 8] = z[0]+data[12];
data[ 4] = SPH_ROTR32(data[ 4] ^ data[ 8], 12);
data[ 0]+= (m[ 1] ^ z[0]) + data[ 4];
data[12] = SPH_ROTR32(data[12] ^ data[ 0],8);
data[ 8]+= data[12];
data[ 4] = SPH_ROTR32(data[ 4] ^ data[ 8], 7);
data[ 1]+= (m[ 2] ^ z[3]) + data[ 5];
data[13] = SPH_ROTR32((z[5] ^ SPH_C32(0x5A0)) ^ data[ 1], 16);
data[ 9] = z[1]+data[13];
data[ 5] = SPH_ROTR32(data[ 5] ^ data[ 9], 12);
data[ 1]+= data[ 5]; //+nonce ^ ...
data[ 2]+= (m[ 4] ^ z[5]) + h[ 0];
data[14] = SPH_ROTR32(z[6] ^ data[ 2],16);
data[10] = z[2] + data[14];
data[ 6] = SPH_ROTR32(h[ 0] ^ data[10], 12);
data[ 2]+= (m[ 5] ^ z[4]) + data[ 6];
data[14] = SPH_ROTR32(data[14] ^ data[ 2], 8);
data[10]+= data[14];
data[ 6] = SPH_ROTR32(data[ 6] ^ data[10], 7);
data[ 3]+= (m[ 6] ^ z[7]) + h[ 1];
data[15] = SPH_ROTR32(z[7] ^ data[ 3],16);
data[11] = z[3] + data[15];
data[ 7] = SPH_ROTR32(h[ 1] ^ data[11], 12);
data[ 3]+= (m[ 7] ^ z[6]) + data[ 7];
data[15] = SPH_ROTR32(data[15] ^ data[ 3],8);
data[11]+= data[15];
data[ 7] = SPH_ROTR32(data[11] ^ data[ 7], 7);
data[ 0]+= m[ 8] ^ z[9];
CUDA_SAFE_CALL(cudaMemcpyToSymbol(c_data, data, 64, 0, cudaMemcpyHostToDevice));
#define precalcXORGS(x,y) { \
preXOR[i++]= (m[x] ^ z[y]); \
preXOR[i++]= (m[y] ^ z[x]); \
}
#define precalcXORGS2(x,y,x1,y1){\
preXOR[i++] = (m[ x] ^ z[ y]);\
preXOR[i++] = (m[x1] ^ z[y1]);\
preXOR[i++] = (m[ y] ^ z[ x]);\
preXOR[i++] = (m[y1] ^ z[x1]);\
}
precalcXORGS(10,11);
preXOR[ 0]+=data[ 6];
preXOR[i++] = (m[9] ^ z[8]);
precalcXORGS2(12,13,14,15);
precalcXORGS2(14,10, 4, 8);
precalcXORGS2( 9,15,13, 6);
precalcXORGS2( 1,12, 0, 2);
precalcXORGS2(11, 7, 5, 3);
precalcXORGS2(11, 8,12, 0);
precalcXORGS2( 5, 2,15,13);
precalcXORGS2(10,14, 3, 6);
precalcXORGS2( 7, 1, 9, 4);
precalcXORGS2( 7, 9, 3, 1);
precalcXORGS2(13,12,11,14);
precalcXORGS2( 2, 6, 5,10);
precalcXORGS2( 4, 0,15, 8);
precalcXORGS2( 9, 0, 5, 7);
precalcXORGS2( 2, 4,10,15);
precalcXORGS2(14, 1,11,12);
precalcXORGS2( 6, 8, 3,13);
precalcXORGS2( 2,12, 6,10);
precalcXORGS2( 0,11, 8, 3);
precalcXORGS2( 4,13, 7, 5);
precalcXORGS2(15,14, 1, 9);
precalcXORGS2(12, 5, 1,15);
precalcXORGS2(14,13, 4,10);
precalcXORGS2( 0, 7, 6, 3);
precalcXORGS2( 9, 2, 8,11);
precalcXORGS2(13,11, 7,14);
precalcXORGS2(12, 1, 3, 9);
precalcXORGS2( 5, 0,15, 4);
precalcXORGS2( 8, 6, 2,10);
precalcXORGS2( 6,15,14, 9);
precalcXORGS2(11, 3, 0, 8);
precalcXORGS2(12, 2,13, 7);
precalcXORGS2( 1, 4,10, 5);
precalcXORGS2(10, 2, 8, 4);
precalcXORGS2( 7, 6, 1, 5);
precalcXORGS2(15,11, 9,14);
precalcXORGS2( 3,12,13, 0);
precalcXORGS2( 0, 1, 2, 3);
precalcXORGS2( 4, 5, 6, 7);
precalcXORGS2( 8, 9,10,11);
precalcXORGS2(12,13,14,15);
precalcXORGS2(14,10, 4, 8);
precalcXORGS2( 9,15,13, 6);
precalcXORGS2( 1,12, 0, 2);
precalcXORGS2(11, 7, 5, 3);
precalcXORGS2(11, 8,12, 0);
precalcXORGS2( 5, 2,15,13);
precalcXORGS2(10,14, 3, 6);
precalcXORGS2( 7, 1, 9, 4);
precalcXORGS2( 7, 9, 3, 1);
precalcXORGS2(13,12,11,14);
precalcXORGS2( 2, 6, 5,10);
precalcXORGS( 4, 0);
precalcXORGS(15, 8);
CUDA_SAFE_CALL(cudaMemcpyToSymbol(c_xors, preXOR, 215*sizeof(uint32_t), 0, cudaMemcpyHostToDevice));
}
}
/* ############################################################################################################################### */