RECON 0a

Features: This architecture enhances RECON-0 architecture with an ADC sequencer.

• 80MHz system clock
• On-chip flash to store program and fpga configuration. Program can be executed in flash.
• 16kB RAM for Programme and Data
• 4kB RAM for exceptions handlers
• 32 IO pins that supports PWM, Programmable Frequency, Interrupts
• Timer to support delay
• UART controller with configurable baudrate
• ADC sequencer that reads 9 analogue pins and on chip temperature sensor diode (TSD)