RECON 2

Features:

• 50MHz system clock and SDRAM clock
• On-chip flash to store program and fpga configuration. Program is copied to SDRAM before execution using Altera’s boot copier.
• 64M-bit (16x4M) SDRAM Controller
• 1kB RAM
• 4kB RAM for exceptions handlers
• 32 IO pins that supports PWM, Programmable Frequency, Interrupts
• Timer to support delay
• UART controller with configurable baudrate
• Note: due the limitation of MAX1000 board on which this configuration was tested, SDRAM clock pin can’t toggle faster than 50MHz. That limitation leads to CPU clock being restricted to 50MHz. Therefore, the frequency counter example has some difficulty measuring frequency higher than 41kHz