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noc layer

JM Joseph edited this page Jan 29, 2018 · 1 revision

Layer

Features

Independent Layers:

  • Clock
  • Buffer Depth,
  • Variable Number of PEs, Routers, Size
  • Calculate IDs from PARSEC?
  • Which technological nodes?
  • 444?,
  • Energy-model:
    • send Flit
    • unsuccessful send flit
  • generalized coordinates? positions?

Architecture

Layer.h is the layer module. External signals: Data links to TSVs. Layer clock is internally generated in LayerClock.h. The layer connects the Tile-Elements according to topology. Open 3D links (due to different topologies per layer) are connected to open/const (false routing must be prevented by routers).

LayerTop.h parses the XML-File for the layer with pugixml (?) and stored the configuration information for all layers. LayerParser is singleton. It holdes the Layer.h instances.

Methods

  • Parse xml file for configuration?
  • Constructor links topology.

XML Format of Layers

Layers are completely configurable at runtime with the following XML description:

<layer>
   <name value="Pattern Recognition Layer"/>
   <technology value="65nm"/>
   <topology value="mesh"/>
   <x_nodes value="4"/>
   <y_nodes value="3"/>
   <router>
      <bufferDepth value="8"/>
      <clockSpeed value="20"/>
      <timing, model, vcs, vca, swa, ... TODO>
   </router>
   
   <processingElemens>
      <clockSpeed value="20"/>
   </processingElemens>

   <connections>
      <upwardConnections>1 3 -1 4 2 5</upwardConnections> <!-- sorted ascending by id. -1 no connection-->
      <downwardConnections>-1 -1 -1 -1 -1</downwardConnections>
   </connections>
</layer>

Komplett anpassbar:

  • routing sinnvoll möglich?
  • feste anzahl an ports per router?
  • gerichtete verbindungen?
<layer>
   <id value="0"/>
   <name value="Pattern Recognition Layer"/>
   <technology value="65nm"/>
  
   <router>
      <bufferDepth value="8"/>
      <clockSpeed value="20"/>
      <timing, model, vcs, vca, swa, ... TODO>
   </router>
   
   <processingElemens>
      <clockSpeed value="20"/>
   </processingElemens>

   <layout>
      <row>1 1 1 1</row>
      <row>1 1 1 1</row>
      <row>1 1 1 1</row>
   </layout>

   <topology value="mesh"/>

   <additionalConnections>
      <con node1="0 0" node2="3 2"/>
      <con node1="3 0" node2="0 2"/>
   </additionalConnections>

</layer>

<layerInterconnects>
   <con node1="0 0 1" node2="0 0 2"/>
</layerInterconnects>

up down wahlfrei:

  • feste anzahl ports
  • support wildcards?
  • clock to hz?
<layer>
   <id value="0"/>
   <name value="Pattern Recognition Layer"/>
   <technology value="65nm"/>
  
   <router>
      <bufferDepth value="8"/>
      <clockSpeed value="20"/>
      <timing, model, vcs, vca, swa, ... TODO>
   </router>
   
   <processingElemens>
      <clockSpeed value="20"/>
   </processingElemens>

   <x_nodes value="4"/>
   <y_nodes value="3"/>
   <topology value="mesh"/>

</layer>

<layerInterconnects>
   <con upperNode="0 0 1" lowerNode="0 0 2"/>
</layerInterconnects>
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