Fix arm64 vet issues

klauspost · May 30, 2024 · 0598afb · 0598afb
1 parent 8bd3916
commit 0598afb
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Showing 2 changed files with 5 additions and 5 deletions.
diff --git a/s2/decode_arm64.s b/s2/decode_arm64.s
@@ -60,7 +60,7 @@
 //
 // The d variable is implicitly R_DST - R_DBASE,  and len(dst)-d is R_DEND - R_DST.
 // The s variable is implicitly R_SRC - R_SBASE, and len(src)-s is R_SEND - R_SRC.
-TEXT ·s2Decode(SB), NOSPLIT, $56-64
+TEXT ·s2Decode(SB), NOSPLIT, $56-56
 	// Initialize R_SRC, R_DST and R_DBASE-R_SEND.
 	MOVD dst_base+0(FP), R_DBASE
 	MOVD dst_len+8(FP), R_DLEN

diff --git a/zstd/internal/xxhash/xxhash_arm64.s b/zstd/internal/xxhash/xxhash_arm64.s
@@ -168,16 +168,16 @@ TEXT ·writeBlocks(SB), NOSPLIT|NOFRAME, $0-40
 
 	// Load state. Assume v[1-4] are stored contiguously.
 	MOVD d+0(FP), digest
-	LDP  0(digest), (v1, v2)
-	LDP  16(digest), (v3, v4)
+	LDP  0(d), (v1, v2)
+	LDP  16(d), (v3, v4)
 
 	LDP b_base+8(FP), (p, n)
 
 	blockLoop()
 
 	// Store updated state.
-	STP (v1, v2), 0(digest)
-	STP (v3, v4), 16(digest)
+	STP (v1, v2), 0(d)
+	STP (v3, v4), 16(d)
 
 	BIC  $31, n
 	MOVD n, ret+32(FP)