sapemu: Start of uploader adapter and bugfixes in emulator

sapemu/src/main.rs

@@ -1,5 +1,6 @@
 //! S-APU / SPC700 emulator.
 #![deny(missing_docs, unused, clippy::all, clippy::pedantic, clippy::nursery, rustdoc::all)]
+#![feature(slice_as_chunks)]
 
 use std::path::PathBuf;
 use std::time::Instant;

sapemu/src/smp.rs

@@ -1,6 +1,7 @@
 //! S-SMP (SPC700 CPU) emulator.
 
 mod ops;
+pub mod upload;
 
 use bitflags::bitflags;
 use log::{debug, error, trace};
@@ -77,7 +78,7 @@ impl CpuIOPorts {
 	pub fn write(&mut self, port_number: u16, value: u8) {
 		Self::check_port_number(port_number);
 
-		trace!("CPUIO {0} = {1:02x} ({1})", port_number, value);
+		trace!("Write CPUIO {0} = {1:02x} ({1})", port_number, value);
 		self.write_ports[port_number as usize] = value;
 	}
 
@@ -98,6 +99,28 @@ impl CpuIOPorts {
 		trace!("Reset CPUIO {0}", port_number);
 		self.read_ports[port_number as usize] = 0;
 	}
+
+	/// Perform a read from the SMP.
+	#[inline]
+	pub fn read_from_smp<const PORT_NUMBER: u8>(&mut self) -> u8 {
+		// FIXME: Should always be a compile-time check...
+		if PORT_NUMBER > 4 {
+			panic!("Illegal port number {PORT_NUMBER}");
+		}
+		trace!("CPU read CPUIO {PORT_NUMBER} = {0:02x} ({0})", self.write_ports[PORT_NUMBER as usize]);
+		self.write_ports[PORT_NUMBER as usize]
+	}
+
+	/// Perform a read to the SMP.
+	#[inline]
+	pub fn write_to_smp<const PORT_NUMBER: u8>(&mut self, value: u8) {
+		// FIXME: Should always be a compile-time check...
+		if PORT_NUMBER > 4 {
+			panic!("Illegal port number {PORT_NUMBER}");
+		}
+		trace!("CPU write CPUIO {PORT_NUMBER} = {0:02x} ({0})", value);
+		self.read_ports[PORT_NUMBER as usize] = value;
+	}
 }
 
 /// CPU clock rate (Hz)

sapemu/src/smp/ops.rs

@@ -811,21 +811,21 @@ fn cmp_dp_imm(cpu: &mut Smp, memory: &mut Memory, cycle: usize, state: Instructi
 
 	match cycle {
 		0 => MicroArchAction::Continue(InstructionInternalState::default()),
-		2 => {
+		1 => {
 			let immediate = cpu.read_next_pc(memory);
-			MicroArchAction::Continue(InstructionInternalState::default().with_operand(immediate))
+			MicroArchAction::Continue(state.with_operand(immediate))
 		},
-		1 => {
+		2 => {
 			let address = cpu.read_next_pc(memory) as u16 + cpu.direct_page_offset();
 			MicroArchAction::Continue(state.with_address(address))
 		},
 		3 => {
-			// Dummy read from destination address according to fullsnes.
 			let operand2 = cpu.read(state.address, memory);
 			MicroArchAction::Continue(state.with_operand2(operand2))
 		},
 		4 => {
 			let result = (state.operand2 as i8).wrapping_sub(state.operand as i8);
+			trace!("cmp {:02x} - {:02x} = {:+}", state.operand2, state.operand, result);
 			cpu.set_negative(result as u8);
 			cpu.set_zero(result as u8);
 			cpu.set_subtract_carry(state.operand2 as i8, state.operand as i8);
@@ -921,17 +921,13 @@ fn mov_dp_imm(cpu: &mut Smp, memory: &mut Memory, cycle: usize, state: Instructi
 
 	match cycle {
 		0 => MicroArchAction::Continue(InstructionInternalState::default()),
-		2 => {
+		1 => {
 			let immediate = cpu.read_next_pc(memory);
-			MicroArchAction::Continue(InstructionInternalState { operand: immediate, ..Default::default() })
+			MicroArchAction::Continue(state.with_operand(immediate))
 		},
-		1 => {
+		2 => {
 			let address = cpu.read_next_pc(memory) as u16 + cpu.direct_page_offset();
-			MicroArchAction::Continue(InstructionInternalState {
-				address,
-				operand: state.operand,
-				..Default::default()
-			})
+			MicroArchAction::Continue(state.with_address(address))
 		},
 		3 => {
 			// Dummy read from destination address according to fullsnes.
@@ -1231,7 +1227,7 @@ fn bne(cpu: &mut Smp, memory: &mut Memory, cycle: usize, state: InstructionInter
 			// branch if Z == 0
 			if !cpu.psw.contains(ProgramStatusWord::Zero) {
 				trace!("taking branch to {:+}", offset);
-				MicroArchAction::Continue(InstructionInternalState { relative: offset, ..Default::default() })
+				MicroArchAction::Continue(InstructionInternalState::default().with_relative(offset))
 			} else {
 				MicroArchAction::Next
 			}

sapemu/src/smp/upload.rs

@@ -0,0 +1,115 @@
+//! Data upload emulation
+//!
+//! This package implements the main CPU side of the SPC700 data upload routine as defined in the boot ROM.
+
+use super::CpuIOPorts;
+
+/// A single data block to be uploaded.
+pub struct DataBlock {
+	/// Start address of the data block.
+	pub address: u16,
+	/// Data in the block.
+	data:        [u8; 256],
+	/// Amount of data in the block.
+	#[allow(unused)]
+	length:      u8,
+}
+
+impl DataBlock {
+	/// Create a data block from an iterable structure that yields bytes.
+	pub fn new(address: u16, iter: impl IntoIterator<Item = u8>) -> Option<Self> {
+		let elements: Vec<_> = iter.into_iter().collect();
+		if elements.len() > 256 {
+			None
+		} else {
+			let mut data = [0; 256];
+			let length = elements.len() as u8;
+			for (i, element) in elements.into_iter().enumerate() {
+				data[i] = element;
+			}
+			Some(Self { address, data, length })
+		}
+	}
+}
+
+/// Uploader responsible for implementing the upload routine.
+pub struct Uploader {
+	current_address:  u16,
+	remaining_blocks: Vec<DataBlock>,
+	entry_point:      u16,
+	state:            UploaderState,
+}
+
+/// Current state of the uploader.
+#[derive(Clone, Copy, Debug, Default)]
+#[allow(unused)]
+enum UploaderState {
+	/// Uploader is waiting for signal value 0xAA in port 0.
+	#[default]
+	WaitingForAA,
+	/// Uploader is waiting for signal value 0xBB in port 1.
+	WaitingForBB,
+	/// Uploader is waiting for acknowledge of 0xCC in port 0.
+	WaitingForAcknowledge,
+	/// Uploader is done with uploading, all data has been sent.
+	Finished,
+}
+
+impl Uploader {
+	/// Create a new uploader without data.
+	pub fn new() -> Self {
+		Self {
+			current_address:  0,
+			remaining_blocks: Vec::new(),
+			entry_point:      0,
+			state:            UploaderState::default(),
+		}
+	}
+
+	/// Specify a code entry point the uploader will send after all blocks have been transferred. This API should be
+	/// used as soon as possible, in particular before all data blocks are sent.
+	pub fn with_entry_point(mut self, entry_point: u16) -> Self {
+		self.entry_point = entry_point;
+		self
+	}
+
+	/// Add another data block to be transferred.
+	pub fn with_block(mut self, block: DataBlock) -> Self {
+		self.remaining_blocks.push(block);
+		self
+	}
+
+	/// Return the current byte the uploader needs to send.
+	pub fn current_byte(&self) -> Option<u8> {
+		self.remaining_blocks
+			.first()
+			.map(|current_block| current_block.data[(self.current_address - current_block.address) as usize])
+	}
+
+	/// Runs the uploader as far as possible.
+	pub fn perform_step(&mut self, ports: &mut CpuIOPorts) {
+		match self.state {
+			UploaderState::WaitingForAA =>
+				if ports.read_from_smp::<0>() == 0xAA {
+					self.state = UploaderState::WaitingForBB;
+				},
+			UploaderState::WaitingForBB =>
+				if ports.read_from_smp::<1>() == 0xBB {
+					ports.write_to_smp::<1>(0x01);
+					self.write_address(ports);
+					ports.write_to_smp::<0>(0xCC);
+					self.state = UploaderState::WaitingForAcknowledge;
+				},
+			UploaderState::WaitingForAcknowledge => {
+				todo!()
+			},
+			UploaderState::Finished => {},
+		}
+	}
+
+	/// Write the current address to the
+	fn write_address(&self, ports: &mut CpuIOPorts) {
+		ports.write_to_smp::<2>((self.current_address & 0xFF) as u8);
+		ports.write_to_smp::<3>(((self.current_address >> 8) & 0xFF) as u8);
+	}
+}