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OpenCL heterogeneous computing, FPGA and TensorFlow neural network to realize handwritten digit recognition project

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OpenCL-FPGA-tf

OpenCL heterogeneous computing, FPGA and TensorFlow neural network to realize handwritten digit recognition project

About

This is an OpenCL-based FPGA accelerator project. OpenCL is an open, emerging cross-platform parallel programming language that can be used for GPU and FPGA development. This project builds an FPGA+CPU heterogeneous computing system and provides a two-layer artificial neural network based on OpenCL and a simple convolutional neural network accelerator design on FPGA. First, the training and testing of the neural network model are implemented in TensorFlow, and then an OpenCL operating platform based on Intel FPGA is built. Finally, handwritten digit recognition is implemented and tested on FPGA.

Neural Network Architecture

The ANN network structure is 784×100×10, with one hidden layer in the middle.

The CNN network contains one convolution layer, one pooling layer and two fully connected layers. The convolution layer uses four 3×3×3×1 convolution kernels, with a step size of 1 and an activation function of ReLU. The network contains one convolution layer, one pooling layer and two fully connected layers. The convolution layer uses four 3×3×3×1 convolution kernels, with a step size of 1 and an activation function of ReLU.

Steps

  1. TensorFlow implementation and training of neural networks python my_mnist_simple_fpga.py

After running, the test image will be tested and two txt files b_sim.txt and w_sim.txt will be generated. They respectively save the bias and weight after training, which need to be written to the FPGA development board.

  1. Kernel code writing and compilation

Compile the kernel and run the terminal command aoc device/mnist_simple.cl -o bin/mnist_simple.aocx -board=de10_nano_sharedonly -v -report

Two new folders will be generated, of which mnist_simple.aocx is the FPGA programming file and needs to be copied to the FPGA development board. The mnist_simple folder contains information related to kernel compilation.

  1. Host code writing and compilation

The host file is in the main.cpp file of /ANN/intelFPGA/de10_nano/test/mnist_simple_one_image/host/src

You need to copy the Makefile from the heool_word file in the IntelFPGA downloaded previously to the mnist_simple_one_image, and then run the terminal command make

Check whether the host file is generated in the mnist_simple_one_image/bin directory

  1. Porting to the FPGA development board

Copy b_sim.txt and w_sim.txt and all txt files in the mnist_txt folder to the SD card of the DE10_nano development board

  1. FPGA runs the neural network

Initialize the OpenCL operating environment

source ./init_opencl.sh

Switch to the mnist_simple_one_image directory and run the terminal command

./host

Tools

DE10_nano development board, a system-on-chip hardware design platform based on Intel FPGA Quartus Prime Standard

Intel FPGA SDK for OpenCL

Intel SoC FPGA EDS

DE10_nano BSP

minicom

TensorFlow

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OpenCL heterogeneous computing, FPGA and TensorFlow neural network to realize handwritten digit recognition project

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