Restore mapper382

src/mappers/mapper382.c

@@ -24,42 +24,74 @@
  */
 
 #include "mapinc.h"
-#include "latch.h"
 
-static uint8 base;
+static uint8 preg[2];
+static uint8 mode;
+static uint8 mirr;
+static uint8 lock;
 
 static SFORMAT StateRegs[] = {
-	{ &base, 1, "BASE"},
+	{ &preg[0], 1, "PRG0" },
+	{ &preg[1], 1, "PRG1" },
+	{ &mode, 1, "MODE" },
+	{ &mirr, 1, "MIRR" },
+	{ &lock, 1, "LOCK" },
 	{ 0 }
 };
 
 static void Sync(void) {
-	if (!(base & 0x20)) {
-		base = latch.addr & 0x3F;
-	}
-	switch (base & 0x08) {
+	switch (mode) {
 	case 1:
 		/* bnrom */
-		setprg32(0x8000, (base << 2) | (latch.data & 0x03));
+		setprg32(0x8000, (preg[1] << 2) | (preg[0] & 3));
 		break;
 	default:
 		/* unrom */
-		setprg16(0x8000, (base << 3) | (latch.data & 0x07));
-		setprg16(0xC000, (base << 3) | 0x07);
+		setprg16(0x8000, (preg[1] << 3) | (preg[0] & 7));
+		setprg16(0xC000, (preg[1] << 3) | 7);
 		break;
 	}
 	setchr8(0);
-	setmirror(((base >> 4) & 0x01) ^ 0x01);
-	/* FCEU_printf("inB[0]:%02x outB[1]:%02x mode:%02x mirr:%02x lock:%02x\n", latch.data, latch.addr, mode, mirr, lock); */
+	setmirror(mirr ^ 1);
+}
+
+static void M382Write(uint16 A, uint8 V) {
+	if (!lock) {
+		preg[1] = (A & 0x07);
+		mode = (A & 0x08) >> 3;
+		mirr = (A & 0x10) >> 4;
+		lock = (A & 0x20) >> 5;
+	}
+	/* inner bank subject to bus conflicts */
+	preg[0] = V & CartBR(A);
+	Sync();
+}
+
+static void M382Power(void) {
+	preg[0] = preg[1] = 0;
+	mode = 0;
+	mirr = 0;
+	lock = 0;
+	Sync();
+	SetReadHandler(0x8000, 0xFFFF, CartBR);
+	SetWriteHandler(0x8000, 0xFFFF, M382Write);
 }
 
 static void M382Reset(void) {
-	base = 0;
-	Latch_RegReset();
+	preg[1] = 0;
+	mode = 0;
+	mirr = 0;
+	lock = 0;
+	Sync();
+}
+
+static void StateRestore(int version) {
+	Sync();
 }
 
 void Mapper382_Init(CartInfo *info) {
-	Latch_Init(info, Sync, NULL, FALSE, TRUE);
+	info->Power = M382Power;
 	info->Reset = M382Reset;
-	AddExState(StateRegs, ~0, 0, NULL);
+	GameStateRestore = StateRestore;
+	AddExState(&StateRegs, ~0, 0, 0);
 }