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@litex-hub

LiteX-Hub

LiteX Hub - Collaborative FPGA projects around LiteX
README.md

👋 Welcome to LiteX Hub

The LiteX Hub hosts collaborative FPGA projects around LiteX.

What is LiteX?

The LiteX framework provides a convenient and efficient infrastructure to create FPGA Cores/SoCs, to explore various digital design architectures and create full FPGA based systems.

LiteX SoC builder framework quick tour/overview: Slides

Want to get started and/or looking for documentation? Make sure to visit the Wiki!

Have a question or want to get in touch? Our IRC channel is #litex at irc.libera.chat.

Popular LiteX Hub Projects

LiteX Boards

LiteX board files to enable support for FPGA platforms from the very tiny Fomu to large PCIe accelerator boards.

Linux on LiteX

Run Linux on many popular FPGA boards!

FPGA 101

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  1. linux-on-litex-vexriscv linux-on-litex-vexriscv Public

    Linux on LiteX-VexRiscv

    Python 596 176

  2. fpga_101 fpga_101 Public

    FPGA 101 lessons/labs

    Python 362 58

  3. litex-boards litex-boards Public

    LiteX boards files

    Python 380 294

  4. ideas ideas Public

    Random ideas and interesting ideas for things we hope to eventually do.

  5. linux linux Public

    Forked from torvalds/linux

    Linux kernel source tree

    C 5 13

  6. linux-on-litex-rocket linux-on-litex-rocket Public

    Run 64-bit Linux on LiteX + RocketChip

    Shell 190 20

Repositories

Showing 10 of 55 repositories
  • litex-boards Public

    LiteX boards files

    litex-hub/litex-boards’s past year of commit activity
    Python 380 BSD-2-Clause 294 34 7 Updated Dec 18, 2024
  • linux Public Forked from torvalds/linux

    Linux kernel source tree

    litex-hub/linux’s past year of commit activity
    C 5 56,498 0 2 Updated Dec 17, 2024
  • pythondata-misc-usb_ohci Public

    Python module containing verilog files for the Spinal-HDL USB OHCI core (for use with LiteX).

    litex-hub/pythondata-misc-usb_ohci’s past year of commit activity
    Verilog 3 1 0 0 Updated Dec 4, 2024
  • litespi Public

    Small footprint and configurable SPI core

    litex-hub/litespi’s past year of commit activity
    Python 40 BSD-2-Clause 24 13 5 Updated Nov 4, 2024
  • pythondata-cpu-vexiiriscv Public

    Python module containing verilog files/generators for VexiiRiscv CPU (for use with LiteX).

    litex-hub/pythondata-cpu-vexiiriscv’s past year of commit activity
    Verilog 1 0 0 0 Updated Nov 1, 2024
  • litei2c Public

    Small footprint and configurable I2C core

    litex-hub/litei2c’s past year of commit activity
    Python 2 BSD-2-Clause 1 2 0 Updated Oct 24, 2024
  • pythondata-cpu-naxriscv Public

    Python module containing verilog files/generators for NaxRiscv CPU (for use with LiteX).

    litex-hub/pythondata-cpu-naxriscv’s past year of commit activity
    Scala 0 MIT 4 0 0 Updated Sep 27, 2024
  • pythondata-cpu-vexriscv_smp Public

    Python module containing verilog files for VexRiscv SMP CPU (for use with LiteX).

    litex-hub/pythondata-cpu-vexriscv_smp’s past year of commit activity
    Verilog 3 11 4 1 Updated Sep 27, 2024
  • pythondata-cpu-vexriscv Public Forked from m-labs/VexRiscv-verilog

    Python module containing verilog files for vexriscv cpu (for use with LiteX).

    litex-hub/pythondata-cpu-vexriscv’s past year of commit activity
    Verilog 7 MIT 39 0 3 Updated Sep 27, 2024
  • pythondata-cpu-serv Public

    Python module containing verilog files for serv cpu (for use with LiteX).

    litex-hub/pythondata-cpu-serv’s past year of commit activity
    Verilog 6 2 0 0 Updated Sep 27, 2024
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