Caravel-QLSOFA-HD

Highlights

• Opensource 12x12 FPGA designed using OpenFPGA prototyping tool
• Designed with Skywater130nm PDK with HD standard cell library + and Custom Transmission Gate Cells
• Base K4 architecture from VPR with 60 vertical and horizontal channels
• Soft adder implementation
• Designed using commercial PnR tool

Contribution

NOTE

• This repository is created for The eFabless Open MPW shuttle program submission
• The repository is auto-updated. For any commits issues and feature requests, please check Skywater-OpenFPGA

Caravel design and CIIC Harness

For caravel related updated refer efabless/caravel