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[corefiles] Remove IBEX_CUSTOM_PMP_RESET_VALUES parameter #4221

[corefiles] Remove IBEX_CUSTOM_PMP_RESET_VALUES parameter

[corefiles] Remove IBEX_CUSTOM_PMP_RESET_VALUES parameter #4221

Triggered via pull request January 9, 2025 18:49
Status Success
Total duration 4h 10m 9s
Artifacts 31

ci.yml

on: pull_request
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 7m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
1h 35m
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
1h 5m
Earl Grey for CW310 / Build bitstream
Lint (slow)
12m 20s
Lint (slow)
Build documentation
4m 57s
Build documentation
Airgapped build
7m 52s
Airgapped build
Verible lint
1m 2s
Verible lint
Run OTBN smoke Test
2m 46s
Run OTBN smoke Test
Run OTBN crypto tests
21m 19s
Run OTBN crypto tests
Verilated English Breakfast
9m 1s
Verilated English Breakfast
Verilated Earl Grey
1h 18m
Verilated Earl Grey
CW305's Bitstream
24m 36s
CW305's Bitstream
Build Docker Containers
2m 59s
Build Docker Containers
Build and test software
14m 39s
Build and test software
CW310 ROM_EXT Tests  /  FPGA test
7m 18s
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
25m 23s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
35m 22s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
30m 44s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
3m 19s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
47s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
6m 46s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
16m 29s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
4m 5s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
38m 3s
CW340 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
4m 10s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
39m 54s
CW310 ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
22s
Verify FPGA jobs
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8 errors
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.4 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
57.5 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
54.3 KB
execute_rom_ext_fpga_tests_cw310-targets
519 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
12.8 KB
execute_rom_ext_fpga_tests_cw340-targets
437 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
7.15 KB
execute_rom_fpga_tests_cw310-targets
1.76 KB
execute_rom_fpga_tests_cw310-test-results
47.3 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
36.9 KB
execute_sival_fpga_tests_cw340-targets
502 Bytes
execute_sival_fpga_tests_cw340-test-results
40 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.25 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
187 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
435 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
17.1 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.23 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
44.4 KB
partial-build-bin-chip_earlgrey_cw310
6.04 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
6.02 MB
partial-build-bin-chip_earlgrey_cw340
9.9 MB
sw_build_test-test-results
74.9 KB
verilated_englishbreakfast
6.99 MB
verilator_earlgrey-test-results
9 KB