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Agree on a naming convention here that makes it obvious what is going on in terms of which IOs related to blocks, which relate to pads and their direction at the block level. E.g. uart_tx_i is an input here but it's actually an output for the UART block. It isn't too hard to make this switch mentally when reading the RTL in this instance but it's not so easy in the case of I2C as the one i2c_scl has both inputs and outputs which are reversed compared to the block and it's easy to get confused.
Points not done:
Route the XADC through pinmux is not a good idea because these are analogue pins.
The text was updated successfully, but these errors were encountered:
WARNING: [Synth 8-6104] Input port 'ser0_rx' has an internal driver [/home/eb/sonata-system/build/lowrisc_sonata_system_0/src/lowrisc_sonata_system_0/rtl/fpga/top_sonata.sv:266]
WARNING: [Synth 8-6104] Input port 'ser1_rx' has an internal driver [/home/eb/sonata-system/build/lowrisc_sonata_system_0/src/lowrisc_sonata_system_0/rtl/fpga/top_sonata.sv:268]
WARNING: [Synth 8-6104] Input port 'rs232_rx' has an internal driver [/home/eb/sonata-system/build/lowrisc_sonata_system_0/src/lowrisc_sonata_system_0/rtl/fpga/top_sonata.sv:270]
WARNING: [Synth 8-6104] Input port 'appspi_d1' has an internal driver [/home/eb/sonata-system/build/lowrisc_sonata_system_0/src/lowrisc_sonata_system_0/rtl/fpga/top_sonata.sv:278]
WARNING: [Synth 8-6104] Input port 'ethmac_cipo' has an internal driver [/home/eb/sonata-system/build/lowrisc_sonata_system_0/src/lowrisc_sonata_system_0/rtl/fpga/top_sonata.sv:281]
WARNING: [Synth 8-6104] Input port 'mb3' has an internal driver [/home/eb/sonata-system/build/lowrisc_sonata_system_0/src/lowrisc_sonata_system_0/rtl/fpga/top_sonata.sv:331]
WARNING: [Synth 8-6104] Input port 'mb8' has an internal driver [/home/eb/sonata-system/build/lowrisc_sonata_system_0/src/lowrisc_sonata_system_0/rtl/fpga/top_sonata.sv:336]
This issue tracks the outstanding tasks for the pin multiplexer.
sonata_system
instead oftop_sonata
: Pinmux and top generation #154 (comment)xbar_main.json
toxbar_main.json.tpl
. Then renamexbar_main_generated.hjson
toxbar_main.json
. #348uart_tx_i
is an input here but it's actually an output for the UART block. It isn't too hard to make this switch mentally when reading the RTL in this instance but it's not so easy in the case of I2C as the onei2c_scl
has both inputs and outputs which are reversed compared to the block and it's easy to get confused.Points not done:
The text was updated successfully, but these errors were encountered: