Implement Burst Memory Access for RTIO DMA & Analyzer

[occheung]

ARTIQ Pull Request

Description of Changes

The PR changes one-by-one memory access from DMA and Analyzer to burst memory read/write. Availability of burst access is indicated by the corresponding streaming FIFO control signals within DMA and the analyzer.

Performance

Using the DMASaturate script in #946 on local I/O on standalone/master variant:
Before: 490mu
After: 65mu
It is on par with Zynq variants' performance reported in #946.

The analyzer memory buffer is expanded to observe the RTIO slack (in machine unit).

The end-to-beginning transition of DMA playbacks is indicated by a sudden drop of RTIO slack. RTIO slack gradually recovers to the maximum value (SED FIFO depth * DMA events period / DMA events per period).

Test

Passes unittests in artiq.test with test_dma_playback_time re-enabled.

test_dma_playback_time (artiq.test.coredevice.test_rtio.DMATest.test_dma_playback_time) ... dt=0.080111704, dt/count=4.0055852e-06
ok

Related Issue

Closes #946

See MiSoC 151, MiSoC 150.

Type of Changes

	Type
✓	✨ New feature

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