Implement Burst Memory Access for RTIO DMA & Analyzer #2592
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ARTIQ Pull Request
Description of Changes
The PR changes one-by-one memory access from DMA and Analyzer to burst memory read/write. Availability of burst access is indicated by the corresponding streaming FIFO control signals within DMA and the analyzer.
Performance
Using the
DMASaturate
script in #946 on local I/O on standalone/master variant:Before: 490mu
After: 65mu
It is on par with Zynq variants' performance reported in #946.
The analyzer memory buffer is expanded to observe the RTIO slack (in machine unit).
The end-to-beginning transition of DMA playbacks is indicated by a sudden drop of RTIO slack. RTIO slack gradually recovers to the maximum value (SED FIFO depth * DMA events period / DMA events per period).
Test
Passes unittests in
artiq.test
withtest_dma_playback_time
re-enabled.Related Issue
Closes #946
See MiSoC 151, MiSoC 150.
Type of Changes
Steps (Choose relevant, delete irrelevant before submitting)
All Pull Requests
Code Changes
flake8
to check code style (follow PEP-8 style).flake8
has issues with parsing Migen/gateware code, ignore as necessary.Git Logistics
git rebase --interactive
). Merge/squash/fixup commits that just fix or amend previous commits. Remove unintended changes & cleanup. See tutorial.git show
). Format:Licensing
See copyright & licensing for more info.
ARTIQ files that do not contain a license header are copyrighted by M-Labs Limited and are licensed under LGPLv3+.