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[EraVM] Only generate GEPs that dominate latch BB in EraVMIndexedMemOpsPrepare #671
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vladimirradosavljevic
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Benchmark results EraVM:
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[EraVM] Only generate GEPs that dominate header BB in EraVMIndexedMem…
[EraVM] Only generate GEPs that dominate latch BB in EraVMIndexedMemOpsPrepare
Aug 8, 2024
akiramenai
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akiramenai
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We don't need TargetPassConfig and TargetTransformInfo analyses and initialize pass dependencies. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
Refactor code to check whether BasePtr is increased by one cell per iteration. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
…psPrepare In case we generate GEP that doesn't dominate latch BB, we will run into an issue and verifier will complain: ``` Instruction does not dominate all uses! %3 = getelementptr inbounds i256, ptr addrspace(1) %0, i256 1 %0 = phi ptr addrspace(1) [ %arg3, %bb1 ], [ %3, %bb5 ] ``` This patch fixes this issue. Signed-off-by: Vladimir Radosavljevic <vr@matterlabs.dev>
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@akiramenai I included two more patches in this PR, so please review this again. |
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LGTM, thank you.
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…OpsPrepare
In case we generate GEP that doesn't dominate latch BB, we will run into an issue and verifier will complain:
This patch fixes this issue.