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2024.07.07 refactoring for flake8
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mclim-rsa25545 committed Jul 8, 2024
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86 changes: 20 additions & 66 deletions .flake8
Original file line number Diff line number Diff line change
Expand Up @@ -6,71 +6,25 @@

[flake8]
# Disabled:
# C0103 Variable name "CF" doesn't conform to snake_case naming styl
# C0114 Missing module docstring
# C0115 Missing class docstring
# C0116 Missing function or method docstring
# C0301 Line too long
# C0303: Trailing whitespace
# C0321 More than one statement on a single line
# C0325 Unnecessary parens after 'if' keyword (superfluous-parens)
# C0326 Exactly one space required around assignment
# C0411 Import order
# C0413 Import should be placed at the top
# E0102 class already defined line
# E116 unexpected indentation (comment) VSCODE comments
# E127 continuation line over-indented for visual indent
# E203 whitespace before ':'
# E221 multiple spaces before operator
# E222 multiple spaces after operator
# E226 missing whitespace around arithmetic operator
# E225 missing whitespace around operator
# E241 multiple spaces after ','
# E251 unexpected spaces around keyword / parameter equals
# E266 too many leading '#' for block comment
# E271 multiple spaces after keyword
# E272 multiple spaces bfore keyword
# E305 expected 2 blank lines after class or function definition, found 1
# E401 Import Error
# E502 the backslash is redundant between brackets
# E0611 no-name-in-module
# E701 multiple statements on one line (colon)
# E704 multiple statements on one line (def)
# E1101 Instance of '' has no 'Init' member
# F541 f-string is missing placeholders
# R0801 Similar lines in 3 files
# R0902 too-many-instance-attributes
# R0903 too-few-public-methods
# W0612 Unused variable
# W0621 Redefining name '' from outer scope
# W0702 No exception type(s) specified (bare-except)
# W1309 Using an f-string that does not have any interpolated variables
#
### Work On Later
# R0201 Method could be a function
# R0205 Class 'FileIO' inherits from object
# R0904 Too many public methods (%s/%s)
# R1714 Consider merging these comparisons with "in" to
# W0201 Attribute %r defined outside __init__
# W0235 Useless super delegation in method '__init__'
# W293 blank line contains whitespace
# E115 expected an indented block (comment)
# E228 missing whitespace around modulo operator
# E231 missing whitespace after ','
# E262 inline comment should start with '# '
# E265 block comment should start with '# '
# E402 module level import not at top of file
# E501 line too long (100 > 79 characters)
# E502 the backslash is redundant between brackets
# E722 do not use bare 'except'
# F401 '' imported but unused
# F841 local variable 'y' is assigned to but never used
ignore=C103, C114, C115, C116, C301, C303, C321, C325, C326, C411, C413,
E102, E116, E127, E203, E221, E222, E225, E226, E241, E251, E266, E271, E272, E302, E305, E401, E502, E611, E701, E704, E731,
F541,
R801, R902, R0903,
W621, W702, W1309, W612, W201, W235, W291,
R201, R205, R904, R1714, R1725,
E115, E228, E231, E265, E262, E402, E501, E502, E722, F401, F841, W293
# E116 unexpected indentation (comment)
# E203 whitespace before ':'
# E221 multiple spaces before operator
# E228 missing whitespace around modulo operator
# E241 multiple spaces after ','
# E261 at least two spaces before inline comment
# E271 multipe spaces after keyword
# E272 Multiple spaces before keyword
# E302 expected 2 blank lines, found 1
# E305 expected 2 blank lines after class or function definition, found 1
# E402 module level import not at top of file
# E501 line too long (85 > 79 characters)
# E502 the backslash is redundant between brackets
# E701 multiple statements on one line(colon)
# E722 do no use bare 'except'
# E731 do not assign a lambda expression, use a def
# F541 f-string is missing placeholders
# F841 local variable 'DataFile' is assigned to but never used

ignore= E116, E203, E221, E228, E241, E261, E271, E272, E302, E305, E402, E501, E502, E701, E722, E731, F541, F841


60 changes: 30 additions & 30 deletions rssd/examples/OSP_Debug.py
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########################################################################
### Rohde & Schwarz Automation for demonstration use.
# ## Rohde & Schwarz Automation for demonstration use.
###
### Purpose: OSP Switch Matrix Example
### Author: mclim
### Date: 2018.09.09
###
### Rack3 Switch Configuration
### ================================================================
### K10:A11-01:A11-P0 K50:A11-55:A11-P10-K1 K70:A11-49:A11-P09-K1
### K11:A11-14:A11-P0 K51:A11-56:A11-P10-K2 K71:A11-67:A11-P12
### K12:A11-26:A11-P0 K52:A11-43:A11-P08-K1 K72:A11-50:A11-P09-K2
### K13:A11-15:A11-P0 K53:A11-44:A11-P08-K2 K73:A11-61:A11-P11
### K14:A11-27:A11-P0 K74:A12-49:A12-P09
### K15:A11-13:A11-P0 K75:A12-37:A12-P07-K1
### K16:A11-25:A11-P0 K76:A12-67:A12-P12
### K17:A11-02:A11-P0 K77:A12-55:A12-P10
### K18:A11-03:A11-P0 K78:A12-61:A12-P11
# ## Purpose: OSP Switch Matrix Example
# ## Author: mclim
# ## Date: 2018.09.09
###
# ## Rack3 Switch Configuration
# ## ================================================================
# ## K10:A11-01:A11-P0 K50:A11-55:A11-P10-K1 K70:A11-49:A11-P09-K1
# ## K11:A11-14:A11-P0 K51:A11-56:A11-P10-K2 K71:A11-67:A11-P12
# ## K12:A11-26:A11-P0 K52:A11-43:A11-P08-K1 K72:A11-50:A11-P09-K2
# ## K13:A11-15:A11-P0 K53:A11-44:A11-P08-K2 K73:A11-61:A11-P11
# ## K14:A11-27:A11-P0 K74:A12-49:A12-P09
# ## K15:A11-13:A11-P0 K75:A12-37:A12-P07-K1
# ## K16:A11-25:A11-P0 K76:A12-67:A12-P12
# ## K17:A11-02:A11-P0 K77:A12-55:A12-P10
# ## K18:A11-03:A11-P0 K78:A12-61:A12-P11

########################################################################
### User Entry
# ## User Entry
########################################################################
OSP_IP = '192.168.1.150' #IP Address
RF1ThruSA = [[12,67,3],[12,49,1],[11,61,1],[11,67,2],[11,49,1]] #K76(RF1)-K74-K73(Thru)K71-K70
RF1HP5GSA = [[12,67,3],[12,49,1],[11,61,2],[11,67,1],[11,49,1]] #K76(RF1)-K74-K73(HP5G)K71-K70
RF1LNASA = [[12,67,3],[12,49,1],[11,61,5],[11,67,3],[11,49,1]] #K76(RF1)-K74-K73(LNA)K71-K70
IFHtoSA = [[11,43,0],[11,56,0],[11,55,1],[11,67,5],[11,49,1]] #K52-K51-K50(Thru)K71-K70
IFHtoSA = [[11,43,0],[11,56,0],[11,55,0],[11,67,6],[11,49,1]] #K52-K51-K50(HP5G)K71-K70
IFVtoSA = [[11,44,0],[11,56,1],[11,55,1],[11,67,5],[11,49,1]] #K53-K51-K50(Thru)K71-K70
RF21Noise = [[12,37,0],[12,49,2],[11,61,4]] #K75-K74-K73
RF1toRF21 = [[12,67,3],[12,49,1],[11,61,1],[12,37,0]] #K76(RF1)-K74-K73-75(RF21)
OSP_IP = '192.168.1.150' # IP Address
RF1ThruSA = [[12, 67, 3], [12, 49, 1], [11, 61, 1], [11, 67, 2], [11, 49, 1]] # K76(RF1)-K74-K73(Thru)K71-K70
RF1HP5GSA = [[12, 67, 3], [12, 49, 1], [11, 61, 2], [11, 67, 1], [11, 49, 1]] # K76(RF1)-K74-K73(HP5G)K71-K70
RF1LNASA = [[12, 67, 3], [12, 49, 1], [11, 61, 5], [11, 67, 3], [11, 49, 1]] # K76(RF1)-K74-K73(LNA)K71-K70
IFHtoSA = [[11, 43, 0], [11, 56, 0], [11, 55, 1], [11, 67, 5], [11, 49, 1]] # K52-K51-K50(Thru)K71-K70
IFHtoSA = [[11, 43, 0], [11, 56, 0], [11, 55, 0], [11, 67, 6], [11, 49, 1]] # K52-K51-K50(HP5G)K71-K70
IFVtoSA = [[11, 44, 0], [11, 56, 1], [11, 55, 1], [11, 67, 5], [11, 49, 1]] # K53-K51-K50(Thru)K71-K70
RF21Noise = [[12, 37, 0], [12, 49, 2], [11, 61, 4]] # K75-K74-K73
RF1toRF21 = [[12, 67, 3], [12, 49, 1], [11, 61, 1], [12, 37, 0]] # K76(RF1)-K74-K73-75(RF21)
Path = RF1ThruSA

########################################################################
### Code Start
# ## Code Start
########################################################################
from rssd.OSP.Common import OSP
Rack3 = OSP()
Rack3.jav_openvisa('TCPIP0::192.168.1.150::INSTR')
#Rack3.Set_SW(11,49,0)
# Rack3.Set_SW(11, 49, 0)
for sw in Path:
Rack3.Set_SW(sw[0],sw[1],sw[2])
Rack3.jav_ClrErr() #Clear Errors
Rack3.Set_SW(sw[0], sw[1], sw[2])
Rack3.jav_ClrErr() # Clear Errors
46 changes: 18 additions & 28 deletions rssd/examples/PNA_LockPower.py
Original file line number Diff line number Diff line change
@@ -1,72 +1,62 @@
##########################################################
### Rohde & Schwarz Automation for demonstration use.
###
### Title : Timing SCPI Commands Example
### Author : mclim
### Date : 2018.05.24
###
##########################################################
### User Entry
##########################################################
SMW_IP = '192.168.1.114'
FSWP_IP = '192.168.1.108'
FreqArry = range(int(39.8e9),int(43e9),int(100e6))
pwrArry = range(-20,-13,1) #Power Array
FreqArry = range(int(39.8e9), int(43e9), int(100e6))
pwrArry = range(-20, -13, 1) # Power Array
numMeas = 1

##########################################################
### Code Overhead: Import and create objects
# ## Code Overhead: Import and create objects
##########################################################
# import time
# from datetime import datetime #pylint: disable=E0611,E0401
from rssd.FileIO import FileIO #pylint: disable=E0611,E0401
from rssd.VSG.Common import VSG #pylint: disable=E0611,E0401
from rssd.PNA.Common import PNA #pylint: disable=E0611,E0401
# from datetime import datetime # pylint: disable=E0611, E0401
from rssd.FileIO import FileIO # pylint: disable=E0611, E0401
from rssd.VSG.Common import VSG # pylint: disable=E0611, E0401
from rssd.PNA.Common import PNA # pylint: disable=E0611, E0401

OFile = FileIO().makeFile(__file__)

##########################################################
### Code Start
# ## Code Start
##########################################################
SMW = VSG().jav_Open(SMW_IP, OFile)
FSWP = PNA().jav_Open(FSWP_IP, OFile)

##########################################################
### Measure Time
# ## Measure Time
##########################################################
Header = 'Iter,SetFreq,SMFPwr,FSWPFreq,FSWPPwr,LockStatus,PN1,PN2,PN3,PN4'
Header = 'Iter, SetFreq, SMFPwr, FSWPFreq, FSWPPwr, LockStatus, PN1, PN2, PN3, PN4'
OFile.write(Header)

FSWP.Set_SweepCont(0)
SMW.Set_RFPwr(-50)
SMW.Set_RFState(1)

for i in range(numMeas): #Loop: Measurements
for freq in FreqArry: #Loop: Frequency
for i in range(numMeas): # Loop: Measurements
for freq in FreqArry: # Loop: Frequency
SMW.Set_Freq(freq)
# FSWP.Set_Freq(freq)
lockHist = []
lockPerf = [2,0,0,0]
for pwr in pwrArry: #Loop: Power
lockPerf = [2, 0, 0, 0]
for pwr in pwrArry: # Loop: Power
SMW.Set_RFPwr(pwr)
FSWP.Set_InitImm()
FSWP.Set_InitImm()
# SMW.delay(2)
lock = FSWP.Get_FreqLock()
mkr = []
for m in range(1,5):
for m in range(1, 5):
mkr.append(FSWP.Get_Mkr_Y(m))
# mkr[m-1] = FSWP.Get_Mkr_Y(m)
ffrq = FSWP.Get_Freq()
fpwr = FSWP.Get_Power()
OutStr = f'{i},{freq},{pwr:.2f},{ffrq},{fpwr},{lock},{mkr}'
OutStr = f'{i}, {freq}, {pwr:.2f}, {ffrq}, {fpwr}, {lock}, {mkr}'
OFile.write(OutStr)
lockHist.append(int(lock))
if (lockHist[-4:] == [2,0,0,0]):
if (lockHist[-4:] == [2, 0, 0, 0]):
break

##########################################################
### Cleanup Automation
# ## Cleanup Automation
##########################################################
SMW.jav_Close()
FSWP.jav_Close()
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