main_module.txt

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity main_module is
port ( Clk  : in std_logic;
       player_input : in std_logic_vector (2 downto 0);
	   RedGreenBlue  : out std_logic_vector (7 downto 0);
	   HS : out std_logic;
	   VS   : out std_logic;
	   LD7, LD6, LD5  : out std_logic;
       Segs : out  std_logic_vector (6 downto 0);
	   AN   : out  std_logic_vector (3 downto 0));
end main_module;

architecture Behavioral of main_module is

component game_logic is
   port ( Clk          : in std_logic;
	       player_input : in std_logic_vector (2 downto 0);
			 player_location   : out std_logic_vector (2 downto 0);
			 obst_locs_1  : out std_logic_vector (31 downto 0);
			 obst_locs_2  : out std_logic_vector (31 downto 0);
			 obst_locs_3  : out std_logic_vector (31 downto 0);
			   score      : out std_logic_vector (7 downto 0);
		  remaining_life : out std_logic_vector (1 downto 0);
		  dead_state : out std_logic);
	       
end component;

component vga is
   port ( rst         : in std_logic;
          pixel_clk   : in std_logic;
          HS          : out std_logic;
          VS          : out std_logic;
          hcount      : out std_logic_vector(10 downto 0);
          vcount      : out std_logic_vector(10 downto 0);
          blank       : out std_logic);
end component;

component clk_wiz is
   port (clk_in_1           : in     std_logic;
         clk_out_1          : out    std_logic);
end component;

component graphics is
   port (pixel_clk    : in std_logic;
	      player_location   : in STD_LOGIC_VECTOR (2 downto 0);
         obst_locs_1,
         obst_locs_2,
         obst_locs_3 : in STD_LOGIC_VECTOR (31 downto 0);
			dead         : in std_logic;
	         hcount    : in std_logic_vector (10 downto 0);
			   vcount    : in std_logic_vector (10 downto 0);
               RedGreenBlue    : out std_logic_vector (7 downto 0));
end component;

component decoder is
   port (   alu_value : in std_logic_vector(7 downto 0); 
					sign : in std_logic;
				  valid : in std_logic;
                clk : in std_logic;
            anode : out std_logic_vector(3 downto 0);
           sev_seg : out std_logic_vector(6 downto 0));
end component;

signal pixel_clk : std_logic;
signal reset : std_logic := '0';
signal score : std_logic_vector (7 downto 0);
signal remaining_life : std_logic_vector (1 downto 0);
signal dead_state : std_logic := '0';
signal player_location : std_logic_vector (2 downto 0) := "010";
signal obstacles_to_draw_1, obstacles_to_draw_2, obstacles_to_draw_3 : std_logic_vector (31 downto 0);
signal horizontal_count, vertical_count : std_logic_vector (10 downto 0);
signal blank : std_logic := '0';
signal sign : std_logic := '0';
signal valid : std_logic := '1';

begin

 
 pixel_clock : clk_wiz
 port map ( clk_in_1  => Clk,
            clk_out_1 => pixel_clk);
 

 game_mechanics : game_logic
 port map ( Clk => pixel_clk,
            player_input => player_input,
            player_location   => player_location,
				obst_locs_1  => obstacles_to_draw_1,
				obst_locs_2  => obstacles_to_draw_2,
				obst_locs_3  => obstacles_to_draw_3,
				     score   => score,
			remaining_life  => remaining_life,
			dead_state  => dead_state);
				
 sync_module : vga
 port map ( rst => reset,
            pixel_clk => pixel_clk,
				HS  => HS,
				VS  => VS,
				hcount => horizontal_count,
				vcount => vertical_count,
				blank => blank);
				
 draw_the_boxes : graphics
 port map ( pixel_clk => pixel_clk,
            player_location  => player_location,
            obst_locs_1 => obstacles_to_draw_1,
				obst_locs_2 => obstacles_to_draw_2,
				obst_locs_3 => obstacles_to_draw_3,
				dead        => dead_state,
				hcount      => horizontal_count,
				vcount      => vertical_count,
				RedGreenBlue         => RedGreenBlue);
				
 score_disp : decoder
 port map (     alu_value => score,
					    sign => sign,
						valid => valid,
                    clk => pixel_clk,
                anode => AN,
               sev_seg => Segs);
process (remaining_life)
begin
   if (remaining_life = "11") then
      LD7 <= '1';
      LD6 <= '1';
      LD5 <= '1';
	elsif (remaining_life = "10") then
	   LD7 <= '1';
      LD6 <= '1';
      LD5 <= '0';
	elsif (remaining_life = "01") then
	   LD7 <= '1';
      LD6 <= '0';
      LD5 <= '0';
	else
	   LD7 <= '0';
      LD6 <= '0';
      LD5 <= '0';
	end if;
end process;


end Behavioral;