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risc-v aal tick implementation proposal.
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devnexen committed Jul 25, 2023
1 parent 9d44660 commit a03fcee
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20 changes: 20 additions & 0 deletions src/snmalloc/aal/aal_riscv.h
Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,26 @@ namespace snmalloc
* microarchitecture.
*/
}

static inline uint64_t tick() noexcept
{
uint64_t t;
#if defined(SNMALLOC_VA_BITS_64)
__asm__ volatile("rdcycle %0" : "=r"(t));
#else
uint32_t high, low, nhigh;
__asm__ volatile(
"jmp%=:"
"rdcycleh %0\n"
"rdcycle %1\n"
"rdcycleh %2\n"
"bne %0, %2, jmp%="
: "=r"(high), "=r"(low), "=r"(nhigh));

t = (static_cast<uint64_t>(high) << 32) | low;
#endif
return t;
}
};

using AAL_Arch = AAL_RISCV;
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