From a1ae7e938e3df6354f39ad7eb18d21d4252328db Mon Sep 17 00:00:00 2001 From: Rjgawuie Date: Thu, 5 Sep 2024 07:10:25 +0000 Subject: [PATCH 1/2] add duos pwm support --- src/platform/milkv/duos.c | 7 +- src/soc/sophgo/sg2000.c | 667 ++++++++++++++++++++++++++++++++++++++ src/soc/sophgo/sg2000.h | 22 ++ src/wiringx.c | 5 + 4 files changed, 700 insertions(+), 1 deletion(-) create mode 100644 src/soc/sophgo/sg2000.c create mode 100644 src/soc/sophgo/sg2000.h diff --git a/src/platform/milkv/duos.c b/src/platform/milkv/duos.c index 657f689..e197f73 100644 --- a/src/platform/milkv/duos.c +++ b/src/platform/milkv/duos.c @@ -66,11 +66,16 @@ static int milkv_duosSetup(void) { void milkv_duosInit(void) { platform_register(&milkv_duos, "milkv_duos"); - milkv_duos->soc = soc_get("Sophgo", "SG200X"); + milkv_duos->soc = soc_get("Sophgo", "SG2000"); milkv_duos->soc->setMap(map, _sizeof(map)); milkvInit(milkv_duos); milkv_duos->setup = &milkv_duosSetup; milkv_duos->validGPIO = &milkv_duosValidGPIO; + + milkv_duos->pwmSetPeriod = milkv_duos->soc->socSetPWMPeriod; + milkv_duos->pwmSetDuty = milkv_duos->soc->socSetPWMDuty; + milkv_duos->pwmSetPolarity = milkv_duos->soc->socSetPWMPolarity; + milkv_duos->pwmEnable = milkv_duos->soc->socEnablePWM; } diff --git a/src/soc/sophgo/sg2000.c b/src/soc/sophgo/sg2000.c new file mode 100644 index 0000000..209c680 --- /dev/null +++ b/src/soc/sophgo/sg2000.c @@ -0,0 +1,667 @@ +/* + Copyright (c) 2024 Shenzhen Milk-V Technology Co., Ltd + Author: William James + Carbon + Zhang Yuntian + wcl + + This Source Code Form is subject to the terms of the Mozilla Public + License, v. 2.0. If a copy of the MPL was not distributed with this + file, You can obtain one at http://mozilla.org/MPL/2.0/. +*/ + +#include "sg2000.h" + +#define SG2000_GPIO_GROUP_COUNT 4 + +static int pin_pwm[][2] = { + {11, 1}, // B11 -> PWM1 + {13, 2}, // B12 -> PWM2 + {19, 3}, // B13 -> PWM3 + {8, 4}, // A16 -> PWM4 + {10, 5}, // A17 -> PWM5 + {22, 6}, // A18 -> PWM6 + {18, 7}, // A19 -> PWM7 + {40, 8}, // E0 -> PWM8 + {42, 9}, // E1 -> PWM9 + {44, 10}, // E2 -> PWM10 + {50, 12}, // B1 -> PWM12 + {48, 13}, // B2 -> PWM13 + {3, 3}, // B20 -> PWM3 + {12, 2}, // B19 -> PWM2 +}; + +struct soc_t *sg2000 = NULL; + +static struct layout_t { + char *name; + int gpio_group; + int num; + + struct { + unsigned long offset; + unsigned long value; + } pinmux; + + struct { + unsigned long offset; + unsigned long bit; + } direction; + + struct { + unsigned long offset; + unsigned long bit; + } data; + + int support; + enum pinmode_t mode; + int fd; +} layout[] = { + {"XGPIOA_0", 0, 480, {0x00, 0x3}, {GPIO_SWPORTA_DDR, 0}, {GPIO_SWPORTA_DR, 0}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_1", 0, 481, {0x04, 0x3}, {GPIO_SWPORTA_DDR, 1}, {GPIO_SWPORTA_DR, 1}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_2", 0, 482, {0x08, 0x3}, {GPIO_SWPORTA_DDR, 2}, {GPIO_SWPORTA_DR, 2}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_3", 0, 483, {0x0c, 0x3}, {GPIO_SWPORTA_DDR, 3}, {GPIO_SWPORTA_DR, 3}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_4", 0, 484, {0x10, 0x3}, {GPIO_SWPORTA_DDR, 4}, {GPIO_SWPORTA_DR, 4}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_5", 0, 485, {0x14, 0x3}, {GPIO_SWPORTA_DDR, 5}, {GPIO_SWPORTA_DR, 5}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_6", 0, 486, {0x18, 0x3}, {GPIO_SWPORTA_DDR, 6}, {GPIO_SWPORTA_DR, 6}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_7", 0, 487, {0x1c, 0x3}, {GPIO_SWPORTA_DDR, 7}, {GPIO_SWPORTA_DR, 7}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_8", 0, 488, {0x20, 0x3}, {GPIO_SWPORTA_DDR, 8}, {GPIO_SWPORTA_DR, 8}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_9", 0, 489, {0x24, 0x3}, {GPIO_SWPORTA_DDR, 9}, {GPIO_SWPORTA_DR, 9}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_10", 0, 490, {0x28, 0x3}, {GPIO_SWPORTA_DDR, 10}, {GPIO_SWPORTA_DR, 10}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_11", 0, 491, {0x2c, 0x3}, {GPIO_SWPORTA_DDR, 11}, {GPIO_SWPORTA_DR, 11}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_12", 0, 492, {0x30, 0x3}, {GPIO_SWPORTA_DDR, 12}, {GPIO_SWPORTA_DR, 12}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_13", 0, 493, {0x34, 0x3}, {GPIO_SWPORTA_DDR, 13}, {GPIO_SWPORTA_DR, 13}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_14", 0, 494, {0x38, 0x3}, {GPIO_SWPORTA_DDR, 14}, {GPIO_SWPORTA_DR, 14}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_15", 0, 495, {0x3c, 0x3}, {GPIO_SWPORTA_DDR, 15}, {GPIO_SWPORTA_DR, 15}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_16", 0, 496, {0x40, 0x3}, {GPIO_SWPORTA_DDR, 16}, {GPIO_SWPORTA_DR, 16}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_17", 0, 497, {0x44, 0x3}, {GPIO_SWPORTA_DDR, 17}, {GPIO_SWPORTA_DR, 17}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_18", 0, 498, {0x68, 0x3}, {GPIO_SWPORTA_DDR, 18}, {GPIO_SWPORTA_DR, 18}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_19", 0, 499, {0x64, 0x3}, {GPIO_SWPORTA_DDR, 19}, {GPIO_SWPORTA_DR, 19}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_20", 0, 500, {0x6c, 0x3}, {GPIO_SWPORTA_DDR, 20}, {GPIO_SWPORTA_DR, 20}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_21", 0, 501, {0x48, 0x3}, {GPIO_SWPORTA_DDR, 21}, {GPIO_SWPORTA_DR, 21}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_22", 0, 502, {0x50, 0x3}, {GPIO_SWPORTA_DDR, 22}, {GPIO_SWPORTA_DR, 22}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_23", 0, 503, {0x5c, 0x3}, {GPIO_SWPORTA_DDR, 23}, {GPIO_SWPORTA_DR, 23}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_24", 0, 504, {0x60, 0x3}, {GPIO_SWPORTA_DDR, 24}, {GPIO_SWPORTA_DR, 24}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_25", 0, 505, {0x54, 0x3}, {GPIO_SWPORTA_DDR, 25}, {GPIO_SWPORTA_DR, 25}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_26", 0, 506, {0x4c, 0x3}, {GPIO_SWPORTA_DDR, 26}, {GPIO_SWPORTA_DR, 26}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_27", 0, 507, {0x58, 0x3}, {GPIO_SWPORTA_DDR, 27}, {GPIO_SWPORTA_DR, 27}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_28", 0, 508, {0x70, 0x3}, {GPIO_SWPORTA_DDR, 28}, {GPIO_SWPORTA_DR, 28}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_29", 0, 509, {0x74, 0x3}, {GPIO_SWPORTA_DDR, 29}, {GPIO_SWPORTA_DR, 29}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOA_30", 0, 510, {0x78, 0x3}, {GPIO_SWPORTA_DDR, 30}, {GPIO_SWPORTA_DR, 30}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + GPIO_UNAVAILABLE("XGPIOA_31"), + {"XGPIOB_0", 1, 448, {0xec, 0x3}, {GPIO_SWPORTA_DDR, 0}, {GPIO_SWPORTA_DR, 0}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_1", 1, 449, {0xf0, 0x3}, {GPIO_SWPORTA_DDR, 1}, {GPIO_SWPORTA_DR, 1}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_2", 1, 450, {0xf4, 0x3}, {GPIO_SWPORTA_DDR, 2}, {GPIO_SWPORTA_DR, 2}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_3", 1, 451, {0xf8, 0x3}, {GPIO_SWPORTA_DDR, 3}, {GPIO_SWPORTA_DR, 3}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_4", 1, 452, {0xfc, 0x3}, {GPIO_SWPORTA_DDR, 4}, {GPIO_SWPORTA_DR, 4}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_5", 1, 453, {0x100, 0x3}, {GPIO_SWPORTA_DDR, 5}, {GPIO_SWPORTA_DR, 5}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_6", 1, 454, {0x108, 0x3}, {GPIO_SWPORTA_DDR, 6}, {GPIO_SWPORTA_DR, 6}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_7", 1, 455, {0x118, 0x3}, {GPIO_SWPORTA_DDR, 7}, {GPIO_SWPORTA_DR, 7}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_8", 1, 456, {0x114, 0x3}, {GPIO_SWPORTA_DDR, 8}, {GPIO_SWPORTA_DR, 8}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_9", 1, 457, {0x120, 0x3}, {GPIO_SWPORTA_DDR, 9}, {GPIO_SWPORTA_DR, 9}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_10", 1, 458, {0x11c, 0x3}, {GPIO_SWPORTA_DDR, 10}, {GPIO_SWPORTA_DR, 10}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_11", 1, 459, {0x134, 0x3}, {GPIO_SWPORTA_DDR, 11}, {GPIO_SWPORTA_DR, 11}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_12", 1, 460, {0x138, 0x3}, {GPIO_SWPORTA_DDR, 12}, {GPIO_SWPORTA_DR, 12}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_13", 1, 461, {0x13c, 0x3}, {GPIO_SWPORTA_DDR, 13}, {GPIO_SWPORTA_DR, 13}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_14", 1, 462, {0x140, 0x3}, {GPIO_SWPORTA_DDR, 14}, {GPIO_SWPORTA_DR, 14}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_15", 1, 463, {0x144, 0x3}, {GPIO_SWPORTA_DDR, 15}, {GPIO_SWPORTA_DR, 15}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_16", 1, 464, {0x148, 0x3}, {GPIO_SWPORTA_DDR, 16}, {GPIO_SWPORTA_DR, 16}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_17", 1, 465, {0x14c, 0x3}, {GPIO_SWPORTA_DDR, 17}, {GPIO_SWPORTA_DR, 17}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_18", 1, 466, {0x150, 0x3}, {GPIO_SWPORTA_DDR, 18}, {GPIO_SWPORTA_DR, 18}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_19", 1, 467, {0x154, 0x3}, {GPIO_SWPORTA_DDR, 19}, {GPIO_SWPORTA_DR, 19}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_20", 1, 468, {0x158, 0x3}, {GPIO_SWPORTA_DDR, 20}, {GPIO_SWPORTA_DR, 20}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_21", 1, 469, {0x15c, 0x3}, {GPIO_SWPORTA_DDR, 21}, {GPIO_SWPORTA_DR, 21}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_22", 1, 470, {0x160, 0x3}, {GPIO_SWPORTA_DDR, 22}, {GPIO_SWPORTA_DR, 22}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_23", 1, 471, {0x1cc, 0x3}, {GPIO_SWPORTA_DDR, 23}, {GPIO_SWPORTA_DR, 23}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_24", 1, 472, {0x128, 0x3}, {GPIO_SWPORTA_DDR, 24}, {GPIO_SWPORTA_DR, 24}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_25", 1, 473, {0x124, 0x3}, {GPIO_SWPORTA_DDR, 25}, {GPIO_SWPORTA_DR, 25}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_26", 1, 474, {0x130, 0x3}, {GPIO_SWPORTA_DDR, 26}, {GPIO_SWPORTA_DR, 26}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOB_27", 1, 475, {0x12c, 0x3}, {GPIO_SWPORTA_DDR, 27}, {GPIO_SWPORTA_DR, 27}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + GPIO_UNAVAILABLE("XGPIOB_28"), + GPIO_UNAVAILABLE("XGPIOB_29"), + GPIO_UNAVAILABLE("XGPIOB_30"), + GPIO_UNAVAILABLE("XGPIOB_31"), + {"XGPIOC_0", 2, 416, {0x164, 0x3}, {GPIO_SWPORTA_DDR, 0}, {GPIO_SWPORTA_DR, 0}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_1", 2, 417, {0x168, 0x3}, {GPIO_SWPORTA_DDR, 1}, {GPIO_SWPORTA_DR, 1}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_2", 2, 418, {0x16c, 0x3}, {GPIO_SWPORTA_DDR, 2}, {GPIO_SWPORTA_DR, 2}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_3", 2, 419, {0x170, 0x3}, {GPIO_SWPORTA_DDR, 3}, {GPIO_SWPORTA_DR, 3}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_4", 2, 420, {0x174, 0x3}, {GPIO_SWPORTA_DDR, 4}, {GPIO_SWPORTA_DR, 4}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_5", 2, 421, {0x178, 0x3}, {GPIO_SWPORTA_DDR, 5}, {GPIO_SWPORTA_DR, 5}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_6", 2, 422, {0x17c, 0x3}, {GPIO_SWPORTA_DDR, 6}, {GPIO_SWPORTA_DR, 6}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_7", 2, 423, {0x180, 0x3}, {GPIO_SWPORTA_DDR, 7}, {GPIO_SWPORTA_DR, 7}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_8", 2, 424, {0x184, 0x3}, {GPIO_SWPORTA_DDR, 8}, {GPIO_SWPORTA_DR, 8}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_9", 2, 425, {0x188, 0x3}, {GPIO_SWPORTA_DDR, 9}, {GPIO_SWPORTA_DR, 9}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_10", 2, 426, {0x18c, 0x3}, {GPIO_SWPORTA_DDR, 10}, {GPIO_SWPORTA_DR, 10}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_11", 2, 427, {0x190, 0x3}, {GPIO_SWPORTA_DDR, 11}, {GPIO_SWPORTA_DR, 11}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_12", 2, 428, {0x1b4, 0x3}, {GPIO_SWPORTA_DDR, 12}, {GPIO_SWPORTA_DR, 12}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_13", 2, 429, {0x1b8, 0x3}, {GPIO_SWPORTA_DDR, 13}, {GPIO_SWPORTA_DR, 13}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_14", 2, 430, {0x1ac, 0x3}, {GPIO_SWPORTA_DDR, 14}, {GPIO_SWPORTA_DR, 14}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_15", 2, 431, {0x1b0, 0x3}, {GPIO_SWPORTA_DDR, 15}, {GPIO_SWPORTA_DR, 15}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_16", 2, 432, {0x1a4, 0x3}, {GPIO_SWPORTA_DDR, 16}, {GPIO_SWPORTA_DR, 16}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_17", 2, 433, {0x1a8, 0x3}, {GPIO_SWPORTA_DDR, 17}, {GPIO_SWPORTA_DR, 17}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_18", 2, 434, {0x194, 0x3}, {GPIO_SWPORTA_DDR, 18}, {GPIO_SWPORTA_DR, 18}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_19", 2, 435, {0x198, 0x3}, {GPIO_SWPORTA_DDR, 19}, {GPIO_SWPORTA_DR, 19}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_20", 2, 436, {0x19c, 0x3}, {GPIO_SWPORTA_DDR, 20}, {GPIO_SWPORTA_DR, 20}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_21", 2, 437, {0x1a0, 0x3}, {GPIO_SWPORTA_DDR, 21}, {GPIO_SWPORTA_DR, 21}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_22", 2, 438, {0x1c0, 0x3}, {GPIO_SWPORTA_DDR, 22}, {GPIO_SWPORTA_DR, 22}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_23", 2, 439, {0x1bc, 0x3}, {GPIO_SWPORTA_DDR, 23}, {GPIO_SWPORTA_DR, 23}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_24", 2, 440, {0x1c8, 0x3}, {GPIO_SWPORTA_DDR, 24}, {GPIO_SWPORTA_DR, 24}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"XGPIOC_25", 2, 441, {0x1c4, 0x3}, {GPIO_SWPORTA_DDR, 25}, {GPIO_SWPORTA_DR, 25}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + GPIO_UNAVAILABLE("XGPIOC_26"), + GPIO_UNAVAILABLE("XGPIOC_27"), + GPIO_UNAVAILABLE("XGPIOC_28"), + GPIO_UNAVAILABLE("XGPIOC_29"), + GPIO_UNAVAILABLE("XGPIOC_30"), + GPIO_UNAVAILABLE("XGPIOC_31"), + {"PWR_GPIO_0", 3, 352, {0xa4, 0x0}, {GPIO_SWPORTA_DDR, 0}, {GPIO_SWPORTA_DR, 0}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_1", 3, 353, {0xa8, 0x0}, {GPIO_SWPORTA_DDR, 1}, {GPIO_SWPORTA_DR, 1}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_2", 3, 354, {0xac, 0x0}, {GPIO_SWPORTA_DDR, 2}, {GPIO_SWPORTA_DR, 2}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_3", 3, 355, {0x84, 0x3}, {GPIO_SWPORTA_DDR, 3}, {GPIO_SWPORTA_DR, 3}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_4", 3, 356, {0x88, 0x3}, {GPIO_SWPORTA_DDR, 4}, {GPIO_SWPORTA_DR, 4}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_5", 3, 357, {0x8c, 0x3}, {GPIO_SWPORTA_DDR, 5}, {GPIO_SWPORTA_DR, 5}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_6", 3, 358, {0x90, 0x3}, {GPIO_SWPORTA_DDR, 6}, {GPIO_SWPORTA_DR, 6}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_7", 3, 359, {0x94, 0x3}, {GPIO_SWPORTA_DDR, 7}, {GPIO_SWPORTA_DR, 7}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_8", 3, 360, {0x98, 0x3}, {GPIO_SWPORTA_DDR, 8}, {GPIO_SWPORTA_DR, 8}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_9", 3, 361, {0x9c, 0x3}, {GPIO_SWPORTA_DDR, 9}, {GPIO_SWPORTA_DR, 9}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_10", 3, 362, {0xb0, 0x3}, {GPIO_SWPORTA_DDR, 10}, {GPIO_SWPORTA_DR, 10}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_11", 3, 363, {0xb4, 0x3}, {GPIO_SWPORTA_DDR, 11}, {GPIO_SWPORTA_DR, 11}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_12", 3, 364, {0xb8, 0x3}, {GPIO_SWPORTA_DDR, 12}, {GPIO_SWPORTA_DR, 12}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_13", 3, 365, {0xbc, 0x3}, {GPIO_SWPORTA_DDR, 13}, {GPIO_SWPORTA_DR, 13}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_14", 3, 366, {0xc0, 0x3}, {GPIO_SWPORTA_DDR, 14}, {GPIO_SWPORTA_DR, 14}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_15", 3, 367, {0xc4, 0x3}, {GPIO_SWPORTA_DDR, 15}, {GPIO_SWPORTA_DR, 15}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_16", 3, 368, {0xc8, 0x3}, {GPIO_SWPORTA_DDR, 16}, {GPIO_SWPORTA_DR, 16}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_17", 3, 369, {0xcc, 0x3}, {GPIO_SWPORTA_DDR, 17}, {GPIO_SWPORTA_DR, 17}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_18", 3, 370, {0xd0, 0x3}, {GPIO_SWPORTA_DDR, 18}, {GPIO_SWPORTA_DR, 18}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_19", 3, 371, {0xd4, 0x3}, {GPIO_SWPORTA_DDR, 19}, {GPIO_SWPORTA_DR, 19}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_20", 3, 372, {0xd8, 0x3}, {GPIO_SWPORTA_DDR, 20}, {GPIO_SWPORTA_DR, 20}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_21", 3, 373, {0xdc, 0x3}, {GPIO_SWPORTA_DDR, 21}, {GPIO_SWPORTA_DR, 21}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_22", 3, 374, {0xe0, 0x3}, {GPIO_SWPORTA_DDR, 22}, {GPIO_SWPORTA_DR, 22}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_23", 3, 375, {0xe4, 0x3}, {GPIO_SWPORTA_DDR, 23}, {GPIO_SWPORTA_DR, 23}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + {"PWR_GPIO_24", 3, 376, {0x1d0, 0x3}, {GPIO_SWPORTA_DDR, 24}, {GPIO_SWPORTA_DR, 24}, FUNCTION_DIGITAL, PINMODE_NOT_SET, 0}, + GPIO_UNAVAILABLE("PWR_GPIO_25"), + GPIO_UNAVAILABLE("PWR_GPIO_26"), + GPIO_UNAVAILABLE("PWR_GPIO_27"), + GPIO_UNAVAILABLE("PWR_GPIO_28"), + GPIO_UNAVAILABLE("PWR_GPIO_29"), + GPIO_UNAVAILABLE("PWR_GPIO_30"), + GPIO_UNAVAILABLE("PWR_GPIO_31"), +}; + +static int sg2000Setup(void) { + int i = 0; + + if((sg2000->fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) { + wiringXLog(LOG_ERR, "wiringX failed to open /dev/mem for raw memory access"); + return -1; + } + for(i = 0; i < SG2000_GPIO_GROUP_COUNT; i++) { + if((sg2000->gpio[i] = (unsigned char *)mmap(0, sg2000->page_size, PROT_READ | PROT_WRITE, MAP_SHARED, sg2000->fd, sg2000->base_addr[i])) == NULL) { + wiringXLog(LOG_ERR, "wiringX failed to map The %s %s GPIO memory address", sg2000->brand, sg2000->chip); + return -1; + } + } + if((pinmux_register_virtual_address = (unsigned char *)mmap(0, sg2000->page_size, PROT_READ | PROT_WRITE, MAP_SHARED, sg2000->fd, PINMUX_BASE)) == NULL) { + wiringXLog(LOG_ERR, "wiringX failed to map The %s %s CRU memory address", sg2000->brand, sg2000->chip); + return -1; + } + + return 0; +} + +static char *sg2000GetPinName(int pin) { + return sg2000->layout[pin].name; +} + +static void sg2000SetMap(int *map, size_t size) { + sg2000->map = map; + sg2000->map_size = size; +} + +static void sg2000SetIRQ(int *irq, size_t size) { + sg2000->irq = irq; + sg2000->irq_size = size; +} + +struct layout_t *sg2000GetLayout(int i, int *mapping) { + struct layout_t *pin = NULL; + unsigned int *grf_reg = NULL; + unsigned int iomux_value = 0; + + if(mapping == NULL) { + wiringXLog(LOG_ERR, "The %s %s has not yet been mapped", sg2000->brand, sg2000->chip); + return NULL; + } + if(wiringXValidGPIO(i) != 0) { + wiringXLog(LOG_ERR, "The %i is not the right GPIO number"); + return NULL; + } + if(sg2000->fd <= 0 || sg2000->gpio == NULL) { + wiringXLog(LOG_ERR, "The %s %s has not yet been setup by wiringX", sg2000->brand, sg2000->chip); + return NULL; + } + + pin = &sg2000->layout[mapping[i]]; + if(pin->support == FUNCTION_UNKNOWN) { + wiringXLog(LOG_ERR, "This pin is currently unavailable"); + return NULL; + } + if(pin->gpio_group < 0 || pin->gpio_group >= SG2000_GPIO_GROUP_COUNT) { + wiringXLog(LOG_ERR, "pin->group out of range: %i, expect 0~3", pin->gpio_group); + return NULL; + } + + return pin; +} + +#define sg2000GetPinLayout(i) (sg2000GetLayout(i, sg2000->map)) +#define sg2000GetIrqLayout(i) (sg2000GetLayout(i, sg2000->irq)) + +static int sg2000DigitalWrite(int i, enum digital_value_t value) { + struct layout_t *pin = NULL; + unsigned int *data_reg = 0; + uint32_t val = 0; + + if((pin = sg2000GetPinLayout(i)) == NULL) { + return -1; + } + + if(pin->mode != PINMODE_OUTPUT) { + wiringXLog(LOG_ERR, "The %s %s GPIO%d is not set to output mode", sg2000->brand, sg2000->chip, i); + return -1; + } + + data_reg = (volatile unsigned int *)(sg2000->gpio[pin->gpio_group] + pin->data.offset + GPIO_SWPORTA_DR); + if(value == HIGH) { + *data_reg |= (1 << (pin->data.bit)); + } else if(value == LOW) { + *data_reg &= ~(1 << (pin->data.bit)); + } else { + wiringXLog(LOG_ERR, "invalid value %i for GPIO %i", value, i); + return -1; + } + + return 0; +} + +static int sg2000DigitalRead(int i) { + struct layout_t *pin = NULL; + unsigned int *data_reg = NULL; + uint32_t val = 0; + + if((pin = sg2000GetPinLayout(i)) == NULL) { + return -1; + } + + if(pin->mode != PINMODE_INPUT) { + wiringXLog(LOG_ERR, "The %s %s GPIO%d is not set to input mode", sg2000->brand, sg2000->chip, i); + return -1; + } + + data_reg = (volatile unsigned int *)(sg2000->gpio[pin->gpio_group] + pin->data.offset + GPIO_EXT_PORTA); + val = *data_reg; + + return (int)((val & (1 << pin->data.bit)) >> pin->data.bit); +} + +static int sg2000PinMode(int i, enum pinmode_t mode) { + struct layout_t *pin = NULL; + unsigned int *pinmux_reg = NULL; + unsigned int *dir_reg = NULL; + unsigned int mask = 0; + + if((pin = sg2000GetPinLayout(i)) == NULL) { + return -1; + } + + pinmux_reg = (volatile unsigned int *) (pinmux_register_virtual_address + pin->pinmux.offset); + *pinmux_reg = pin->pinmux.value; + + dir_reg = (volatile unsigned int *)(sg2000->gpio[pin->gpio_group] + pin->direction.offset); + if(mode == PINMODE_INPUT) { + *dir_reg &= ~(1 << pin->direction.bit); + } else if(mode == PINMODE_OUTPUT) { + *dir_reg |= (1 << pin->direction.bit); + } else { + wiringXLog(LOG_ERR, "invalid pin mode %i for GPIO %i", mode, i); + return -1; + } + + pin->mode = mode; + + return 0; +} + +static int sg2000ISR(int i, enum isr_mode_t mode) { + struct layout_t *pin = NULL; + char path[PATH_MAX]; + memset(path, 0, sizeof(path)); + + if((pin = sg2000GetIrqLayout(i)) == NULL) { + return -1; + } + + sprintf(path, "/sys/class/gpio/gpio%d", pin->num); + if((soc_sysfs_check_gpio(sg2000, path)) == -1) { + sprintf(path, "/sys/class/gpio/export"); + if(soc_sysfs_gpio_export(sg2000, path, pin->num) == -1) { + return -1; + } + } + + sprintf(path, "/sys/devices/platform/%x.gpio/gpiochip%d/gpio/gpio%d/direction", gpio_register_physical_address[pin->gpio_group], pin->gpio_group, pin->num); + if(soc_sysfs_set_gpio_direction(sg2000, path, "in") == -1) { + return -1; + } + + sprintf(path, "/sys/devices/platform/%x.gpio/gpiochip%d/gpio/gpio%d/edge", gpio_register_physical_address[pin->gpio_group], pin->gpio_group, pin->num); + if(soc_sysfs_set_gpio_interrupt_mode(sg2000, path, mode) == -1) { + return -1; + } + + sprintf(path, "/sys/devices/platform/%x.gpio/gpiochip%d/gpio/gpio%d/value", gpio_register_physical_address[pin->gpio_group], pin->gpio_group, pin->num); + if((pin->fd = soc_sysfs_gpio_reset_value(sg2000, path)) == -1) { + return -1; + } + + pin->mode = PINMODE_INTERRUPT; + + return 0; +} + +static int sg2000WaitForInterrupt(int i, int ms) { + struct layout_t *pin = NULL; + + if((pin = sg2000GetIrqLayout(i)) == NULL) { + return -1; + } + + if(pin->mode != PINMODE_INTERRUPT) { + wiringXLog(LOG_ERR, "The %s %s GPIO %d is not set to interrupt mode", sg2000->brand, sg2000->chip, i); + return -1; + } + + return soc_wait_for_interrupt(sg2000, pin->fd, ms); +} + +static int sg2000GC(void) { + struct layout_t *pin = NULL; + char path[PATH_MAX]; + int i = 0; + memset(path, 0, sizeof(path)); + + if(sg2000->map != NULL) { + for(i = 0; i < sg2000->map_size; i++) { + pin = &sg2000->layout[sg2000->map[i]]; + if(pin->mode == PINMODE_OUTPUT) { + pinMode(i, PINMODE_INPUT); + } else if(pin->mode == PINMODE_INTERRUPT) { + sprintf(path, "/sys/class/gpio/gpio%d", pin->num); + if((soc_sysfs_check_gpio(sg2000, path)) == 0) { + sprintf(path, "/sys/class/gpio/unexport"); + soc_sysfs_gpio_unexport(sg2000, path, pin->num); + } + } + + if(pin->fd > 0) { + close(pin->fd); + pin->fd = 0; + } + } + } + + if(pinmux_register_virtual_address != NULL) { + munmap(pinmux_register_virtual_address, sg2000->page_size); + pinmux_register_virtual_address = NULL; + } + for(i = 0; i < SG2000_GPIO_GROUP_COUNT; i++) { + if(sg2000->gpio[i] != NULL) { + munmap(sg2000->gpio[i], sg2000->page_size); + sg2000->gpio[i] = NULL; + } + } + + return 0; +} + +static int sg2000SelectableFd(int i) { + struct layout_t *pin = NULL; + + if((pin = sg2000GetIrqLayout(i)) == NULL) { + return -1; + } + + return pin->fd; +} + +int sg2000_sysfs_pwm_set_long(struct soc_t *soc, char *path, long value) { + char out[16]; + int fd = 0; + if((fd = open(path, O_WRONLY)) <= 0) { + wiringXLog(LOG_ERR, "The %s %s cannot open %s for PWM (%s)", soc->brand, soc->chip, path, strerror(errno)); + return -1; + } + int l = snprintf(out, 16, "%ld", value); + if (write(fd, out, l) != l) { + wiringXLog(LOG_ERR, "The %s %s failed to write to %s for PWM (%s)", soc->brand, soc->chip, path, strerror(errno)); + close(fd); + return -1; + } + close(fd); + + return 0; +} + +int sg2000_sysfs_pwm_set_string(struct soc_t *soc, char *path, char *str) { + int fd = 0; + if ((fd = open(path, O_WRONLY)) <= 0) { + wiringXLog(LOG_ERR, "The %s %s cannot open %s for PWM (%s)", soc->brand, soc->chip, path, strerror(errno)); + return -1; + } + int l = strlen(str); + if (write(fd, str, l) != l) { + wiringXLog(LOG_ERR, "The %s %s failed to write to %s for PWM (%s)", soc->brand, soc->chip, path, strerror(errno)); + close(fd); + return -1; + } + close(fd); + + return 0; +} + +/* +index | 0 1 2 3 +----------+------------------------- +pwmchip0 -> pwm0, pwm1, pwm2, pwm3 +pwmchip4 -> pwm4, pwm5, pwm6, pwm7 +pwmchip8 -> pwm8, pwm9, pwm10,pwm11 +pwmchip12 -> pwm12,pwm13,pwm14,pwm15 +*/ +static int sg2000_get_pwm(int pin, int *chip, int *index) { + int i; + int found = 0; + int pwm; + + for (i = 0; i < 14; i++) { + if (pin == pin_pwm[i][0]) { + found = 1; + pwm = pin_pwm[i][1]; + break; + } + } + + if (found == 0) { + wiringXLog(LOG_ERR, "GP%d is not a PWM pin", pin); + return -1; + } + + if (pwm < 1 || pwm > 13) { + wiringXLog(LOG_ERR, "pwm %d not supported", pwm); + return -1; + } + + //wiringXLog(LOG_INFO, "GP%d is PWM%d", pin, pwm); + + *chip = (pwm / 4) * 4; + *index = pwm % 4; + + return pwm; +} + +static int sg2000SetPWMPeriod(int pin, long period) { + int chip = 0; + int index = 0; + char path[PATH_MAX]; + int pwm = sg2000_get_pwm(pin, &chip, &index); + + if (pwm < 0) { + wiringXLog(LOG_ERR, "[%s:%d] get pwm for pin(%d) failed!", __func__, __LINE__, pin); + return -1; + } + + memset(path, 0, sizeof(path)); + + //wiringXLog(LOG_INFO, "[%s:%d], GP%d/PWM%d(chip:%d,index:%d), period: %ld", __func__, __LINE__, pin, pwm, chip, index, period); + + sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d", chip, index); + if ((soc_sysfs_check_gpio(sg2000, path)) == -1) { + sprintf(path, "/sys/class/pwm/pwmchip%d/export", chip); + if (soc_sysfs_gpio_export(sg2000, path, index) == -1) { + return -1; + } + } + + sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d/period", chip, index); + if (sg2000_sysfs_pwm_set_long(sg2000, path, period) == -1) { + return -1; + } + + return 0; +} + +static int sg2000SetPWMDuty(int pin, long duty_cycle) { + int chip = 0; + int index = 0; + char path[PATH_MAX]; + int pwm = sg2000_get_pwm(pin, &chip, &index); + + if (pwm < 0) { + wiringXLog(LOG_ERR, "[%s:%d] get pwm for pin(%d) failed!", __func__, __LINE__, pin); + return -1; + } + + //wiringXLog(LOG_INFO, "[%s:%d], GP%d/PWM%d(chip:%d,index:%d), duty_cycle: %ld", __func__, __LINE__, pin, pwm, chip, index, duty_cycle); + + sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d", chip, index); + if ((soc_sysfs_check_gpio(sg2000, path)) == -1) { + sprintf(path, "/sys/class/pwm/pwmchip%d/export", chip); + if (soc_sysfs_gpio_export(sg2000, path, index) == -1) { + return -1; + } + } + + sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d/duty_cycle", chip, index); + if (sg2000_sysfs_pwm_set_long(sg2000, path, duty_cycle) == -1) { + return -1; + } + + return 0; +} + +/* + 0 - normal + 1 - inversed +*/ +static int sg2000SetPWMPolarity(int pin, int polarity) { + int chip = 0; + int index = 0; + char path[PATH_MAX]; + char polarity_str[16]; + int pwm = sg2000_get_pwm(pin, &chip, &index); + + if (pwm < 0) { + wiringXLog(LOG_ERR, "[%s:%d] get pwm for pin(%d) failed!", __func__, __LINE__, pin); + return -1; + } + + memset(path, 0, sizeof(path)); + + //wiringXLog(LOG_INFO, "[%s:%d], GP%d/PWM%d(chip:%d,index:%d), polarity: %ld", __func__, __LINE__, pin, pwm, chip, index, polarity); + + sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d", chip, index); + if ((soc_sysfs_check_gpio(sg2000, path)) == -1) { + sprintf(path, "/sys/class/pwm/pwmchip%d/export", chip); + if(soc_sysfs_gpio_export(sg2000, path, index) == -1) { + return -1; + } + } + + sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d/polarity", chip, index); + + if (polarity == 0) { + sprintf(polarity_str, "normal"); + } else { + sprintf(polarity_str, "inversed"); + } + + if (sg2000_sysfs_pwm_set_string(sg2000, path, polarity_str) == -1) { + return -1; + } + + return 0; +} + +static int sg2000EnablePWM(int pin, int enable) { + int chip = 0; + int index = 0; + char path[PATH_MAX]; + int pwm = sg2000_get_pwm(pin, &chip, &index); + + if (pwm < 0) { + wiringXLog(LOG_ERR, "[%s:%d] get pwm for pin(%d) failed!", __func__, __LINE__, pin); + return -1; + } + + //wiringXLog(LOG_INFO, "[%s:%d], GP%d/PWM%d(chip:%d,index:%d), enable: %ld", __func__, __LINE__, pin, pwm, chip, index, enable); + + sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d", chip, index); + if ((soc_sysfs_check_gpio(sg2000, path)) == -1) { + sprintf(path, "/sys/class/pwm/pwmchip%d/export", chip); + if (soc_sysfs_gpio_export(sg2000, path, index) == -1) { + return -1; + } + } + + sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d/enable", chip, index); + if (sg2000_sysfs_pwm_set_long(sg2000, path, enable) == -1) { + return -1; + } + + return 0; +} + +void sg2000Init(void) { + soc_register(&sg2000, "Sophgo", "SG2000"); + + sg2000->layout = layout; + + sg2000->support.isr_modes = ISR_MODE_RISING | ISR_MODE_FALLING | ISR_MODE_BOTH | ISR_MODE_NONE; + sg2000->page_size = (1024*4); + memcpy(sg2000->base_addr, gpio_register_physical_address, sizeof(gpio_register_physical_address)); + + sg2000->gc = &sg2000GC; + sg2000->selectableFd = &sg2000SelectableFd; + sg2000->pinMode = &sg2000PinMode; + sg2000->setup = &sg2000Setup; + sg2000->digitalRead = &sg2000DigitalRead; + sg2000->digitalWrite = &sg2000DigitalWrite; + sg2000->getPinName = &sg2000GetPinName; + sg2000->setMap = &sg2000SetMap; + sg2000->setIRQ = &sg2000SetIRQ; + sg2000->isr = &sg2000ISR; + sg2000->waitForInterrupt = &sg2000WaitForInterrupt; + + sg2000->socSetPWMPeriod = &sg2000SetPWMPeriod; + sg2000->socSetPWMDuty = &sg2000SetPWMDuty; + sg2000->socSetPWMPolarity = &sg2000SetPWMPolarity; + sg2000->socEnablePWM = &sg2000EnablePWM; +} diff --git a/src/soc/sophgo/sg2000.h b/src/soc/sophgo/sg2000.h new file mode 100644 index 0000000..e38cb7f --- /dev/null +++ b/src/soc/sophgo/sg2000.h @@ -0,0 +1,22 @@ +/* + Copyright (c) 2024 Shenzhen Milk-V Technology Co., Ltd + Author: William James + Carbon + Zhang Yuntian + wcl + + This Source Code Form is subject to the terms of the Mozilla Public + License, v. 2.0. If a copy of the MPL was not distributed with this + file, You can obtain one at http://mozilla.org/MPL/2.0/. +*/ + +#ifndef __WIRINGX_SG200X_H +#define __WIRINGX_SG200X_H + +#include "common.h" + +extern struct soc_t *sg2000; + +void sg2000Init(void); + +#endif diff --git a/src/wiringx.c b/src/wiringx.c index 060b817..d89ff9e 100644 --- a/src/wiringx.c +++ b/src/wiringx.c @@ -42,6 +42,7 @@ #include "soc/rockchip/rk3588.h" #include "soc/sophgo/cv180x.h" #include "soc/sophgo/sg200x.h" +#include "soc/sophgo/sg2000.h" #include "platform/linksprite/pcduino1.h" #include "platform/lemaker/bananapi1.h" @@ -68,6 +69,9 @@ #include "platform/milkv/duo256m.h" #include "platform/milkv/duos.h" +typedef time_t __time_t; +typedef suseconds_t __suseconds_t; + void wiringXDefaultLog(int prio, char *file, int line, const char *format_str, ...); static struct platform_t *platform = NULL; @@ -248,6 +252,7 @@ static void wiringXInit(void) { rk3588Init(); cv180xInit(); sg200xInit(); + sg2000Init(); /* Init all platforms */ pcduino1Init(); From 3612a6f74db4365d6af7db09d9e902bb49894342 Mon Sep 17 00:00:00 2001 From: Rjgawuie Date: Thu, 19 Sep 2024 15:09:53 +0000 Subject: [PATCH 2/2] rename sg200x 2 sg2002 --- src/platform/milkv/duo256m.c | 2 +- src/soc/sophgo/{sg200x.c => sg2002.c} | 216 +++++++++++++------------- src/soc/sophgo/{sg200x.h => sg2002.h} | 8 +- src/wiringx.c | 4 +- 4 files changed, 115 insertions(+), 115 deletions(-) rename src/soc/sophgo/{sg200x.c => sg2002.c} (82%) rename src/soc/sophgo/{sg200x.h => sg2002.h} (81%) diff --git a/src/platform/milkv/duo256m.c b/src/platform/milkv/duo256m.c index 7b8fd6d..1374e79 100644 --- a/src/platform/milkv/duo256m.c +++ b/src/platform/milkv/duo256m.c @@ -48,7 +48,7 @@ static int milkv_duo256mSetup(void) { void milkv_duo256mInit(void) { platform_register(&milkv_duo256m, "milkv_duo256m"); - milkv_duo256m->soc = soc_get("Sophgo", "SG200X"); + milkv_duo256m->soc = soc_get("Sophgo", "SG2002"); milkv_duo256m->soc->setMap(map, _sizeof(map)); milkvInit(milkv_duo256m); diff --git a/src/soc/sophgo/sg200x.c b/src/soc/sophgo/sg2002.c similarity index 82% rename from src/soc/sophgo/sg200x.c rename to src/soc/sophgo/sg2002.c index 8c5cd6d..ebbcd5e 100644 --- a/src/soc/sophgo/sg200x.c +++ b/src/soc/sophgo/sg2002.c @@ -10,9 +10,9 @@ file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -#include "sg200x.h" +#include "sg2002.h" -#define SG200X_GPIO_GROUP_COUNT 4 +#define SG2002_GPIO_GROUP_COUNT 4 static int pin_pwm[12][2] = { {2, 7}, // GP2 -> PWM7 @@ -29,7 +29,7 @@ static int pin_pwm[12][2] = { {13, 5} // GP13 -> PWM5 }; -struct soc_t *sg200x = NULL; +struct soc_t *sg2002 = NULL; static struct layout_t { char *name; @@ -185,65 +185,65 @@ static struct layout_t { GPIO_UNAVAILABLE("PWR_GPIO_31"), }; -static int sg200xSetup(void) { +static int sg2002Setup(void) { int i = 0; - if((sg200x->fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) { + if((sg2002->fd = open("/dev/mem", O_RDWR | O_SYNC)) < 0) { wiringXLog(LOG_ERR, "wiringX failed to open /dev/mem for raw memory access"); return -1; } - for(i = 0; i < SG200X_GPIO_GROUP_COUNT; i++) { - if((sg200x->gpio[i] = (unsigned char *)mmap(0, sg200x->page_size, PROT_READ | PROT_WRITE, MAP_SHARED, sg200x->fd, sg200x->base_addr[i])) == NULL) { - wiringXLog(LOG_ERR, "wiringX failed to map The %s %s GPIO memory address", sg200x->brand, sg200x->chip); + for(i = 0; i < SG2002_GPIO_GROUP_COUNT; i++) { + if((sg2002->gpio[i] = (unsigned char *)mmap(0, sg2002->page_size, PROT_READ | PROT_WRITE, MAP_SHARED, sg2002->fd, sg2002->base_addr[i])) == NULL) { + wiringXLog(LOG_ERR, "wiringX failed to map The %s %s GPIO memory address", sg2002->brand, sg2002->chip); return -1; } } - if((pinmux_register_virtual_address = (unsigned char *)mmap(0, sg200x->page_size, PROT_READ | PROT_WRITE, MAP_SHARED, sg200x->fd, PINMUX_BASE)) == NULL) { - wiringXLog(LOG_ERR, "wiringX failed to map The %s %s CRU memory address", sg200x->brand, sg200x->chip); + if((pinmux_register_virtual_address = (unsigned char *)mmap(0, sg2002->page_size, PROT_READ | PROT_WRITE, MAP_SHARED, sg2002->fd, PINMUX_BASE)) == NULL) { + wiringXLog(LOG_ERR, "wiringX failed to map The %s %s CRU memory address", sg2002->brand, sg2002->chip); return -1; } return 0; } -static char *sg200xGetPinName(int pin) { - return sg200x->layout[pin].name; +static char *sg2002GetPinName(int pin) { + return sg2002->layout[pin].name; } -static void sg200xSetMap(int *map, size_t size) { - sg200x->map = map; - sg200x->map_size = size; +static void sg2002SetMap(int *map, size_t size) { + sg2002->map = map; + sg2002->map_size = size; } -static void sg200xSetIRQ(int *irq, size_t size) { - sg200x->irq = irq; - sg200x->irq_size = size; +static void sg2002SetIRQ(int *irq, size_t size) { + sg2002->irq = irq; + sg2002->irq_size = size; } -struct layout_t *sg200xGetLayout(int i, int *mapping) { +struct layout_t *sg2002GetLayout(int i, int *mapping) { struct layout_t *pin = NULL; unsigned int *grf_reg = NULL; unsigned int iomux_value = 0; if(mapping == NULL) { - wiringXLog(LOG_ERR, "The %s %s has not yet been mapped", sg200x->brand, sg200x->chip); + wiringXLog(LOG_ERR, "The %s %s has not yet been mapped", sg2002->brand, sg2002->chip); return NULL; } if(wiringXValidGPIO(i) != 0) { wiringXLog(LOG_ERR, "The %i is not the right GPIO number"); return NULL; } - if(sg200x->fd <= 0 || sg200x->gpio == NULL) { - wiringXLog(LOG_ERR, "The %s %s has not yet been setup by wiringX", sg200x->brand, sg200x->chip); + if(sg2002->fd <= 0 || sg2002->gpio == NULL) { + wiringXLog(LOG_ERR, "The %s %s has not yet been setup by wiringX", sg2002->brand, sg2002->chip); return NULL; } - pin = &sg200x->layout[mapping[i]]; + pin = &sg2002->layout[mapping[i]]; if(pin->support == FUNCTION_UNKNOWN) { wiringXLog(LOG_ERR, "This pin is currently unavailable"); return NULL; } - if(pin->gpio_group < 0 || pin->gpio_group >= SG200X_GPIO_GROUP_COUNT) { + if(pin->gpio_group < 0 || pin->gpio_group >= SG2002_GPIO_GROUP_COUNT) { wiringXLog(LOG_ERR, "pin->group out of range: %i, expect 0~3", pin->gpio_group); return NULL; } @@ -251,24 +251,24 @@ struct layout_t *sg200xGetLayout(int i, int *mapping) { return pin; } -#define sg200xGetPinLayout(i) (sg200xGetLayout(i, sg200x->map)) -#define sg200xGetIrqLayout(i) (sg200xGetLayout(i, sg200x->irq)) +#define sg2002GetPinLayout(i) (sg2002GetLayout(i, sg2002->map)) +#define sg2002GetIrqLayout(i) (sg2002GetLayout(i, sg2002->irq)) -static int sg200xDigitalWrite(int i, enum digital_value_t value) { +static int sg2002DigitalWrite(int i, enum digital_value_t value) { struct layout_t *pin = NULL; unsigned int *data_reg = 0; uint32_t val = 0; - if((pin = sg200xGetPinLayout(i)) == NULL) { + if((pin = sg2002GetPinLayout(i)) == NULL) { return -1; } if(pin->mode != PINMODE_OUTPUT) { - wiringXLog(LOG_ERR, "The %s %s GPIO%d is not set to output mode", sg200x->brand, sg200x->chip, i); + wiringXLog(LOG_ERR, "The %s %s GPIO%d is not set to output mode", sg2002->brand, sg2002->chip, i); return -1; } - data_reg = (volatile unsigned int *)(sg200x->gpio[pin->gpio_group] + pin->data.offset + GPIO_SWPORTA_DR); + data_reg = (volatile unsigned int *)(sg2002->gpio[pin->gpio_group] + pin->data.offset + GPIO_SWPORTA_DR); if(value == HIGH) { *data_reg |= (1 << (pin->data.bit)); } else if(value == LOW) { @@ -281,40 +281,40 @@ static int sg200xDigitalWrite(int i, enum digital_value_t value) { return 0; } -static int sg200xDigitalRead(int i) { +static int sg2002DigitalRead(int i) { struct layout_t *pin = NULL; unsigned int *data_reg = NULL; uint32_t val = 0; - if((pin = sg200xGetPinLayout(i)) == NULL) { + if((pin = sg2002GetPinLayout(i)) == NULL) { return -1; } if(pin->mode != PINMODE_INPUT) { - wiringXLog(LOG_ERR, "The %s %s GPIO%d is not set to input mode", sg200x->brand, sg200x->chip, i); + wiringXLog(LOG_ERR, "The %s %s GPIO%d is not set to input mode", sg2002->brand, sg2002->chip, i); return -1; } - data_reg = (volatile unsigned int *)(sg200x->gpio[pin->gpio_group] + pin->data.offset + GPIO_EXT_PORTA); + data_reg = (volatile unsigned int *)(sg2002->gpio[pin->gpio_group] + pin->data.offset + GPIO_EXT_PORTA); val = *data_reg; return (int)((val & (1 << pin->data.bit)) >> pin->data.bit); } -static int sg200xPinMode(int i, enum pinmode_t mode) { +static int sg2002PinMode(int i, enum pinmode_t mode) { struct layout_t *pin = NULL; unsigned int *pinmux_reg = NULL; unsigned int *dir_reg = NULL; unsigned int mask = 0; - if((pin = sg200xGetPinLayout(i)) == NULL) { + if((pin = sg2002GetPinLayout(i)) == NULL) { return -1; } pinmux_reg = (volatile unsigned int *) (pinmux_register_virtual_address + pin->pinmux.offset); *pinmux_reg = pin->pinmux.value; - dir_reg = (volatile unsigned int *)(sg200x->gpio[pin->gpio_group] + pin->direction.offset); + dir_reg = (volatile unsigned int *)(sg2002->gpio[pin->gpio_group] + pin->direction.offset); if(mode == PINMODE_INPUT) { *dir_reg &= ~(1 << pin->direction.bit); } else if(mode == PINMODE_OUTPUT) { @@ -329,35 +329,35 @@ static int sg200xPinMode(int i, enum pinmode_t mode) { return 0; } -static int sg200xISR(int i, enum isr_mode_t mode) { +static int sg2002ISR(int i, enum isr_mode_t mode) { struct layout_t *pin = NULL; char path[PATH_MAX]; memset(path, 0, sizeof(path)); - if((pin = sg200xGetIrqLayout(i)) == NULL) { + if((pin = sg2002GetIrqLayout(i)) == NULL) { return -1; } sprintf(path, "/sys/class/gpio/gpio%d", pin->num); - if((soc_sysfs_check_gpio(sg200x, path)) == -1) { + if((soc_sysfs_check_gpio(sg2002, path)) == -1) { sprintf(path, "/sys/class/gpio/export"); - if(soc_sysfs_gpio_export(sg200x, path, pin->num) == -1) { + if(soc_sysfs_gpio_export(sg2002, path, pin->num) == -1) { return -1; } } sprintf(path, "/sys/devices/platform/%x.gpio/gpiochip%d/gpio/gpio%d/direction", gpio_register_physical_address[pin->gpio_group], pin->gpio_group, pin->num); - if(soc_sysfs_set_gpio_direction(sg200x, path, "in") == -1) { + if(soc_sysfs_set_gpio_direction(sg2002, path, "in") == -1) { return -1; } sprintf(path, "/sys/devices/platform/%x.gpio/gpiochip%d/gpio/gpio%d/edge", gpio_register_physical_address[pin->gpio_group], pin->gpio_group, pin->num); - if(soc_sysfs_set_gpio_interrupt_mode(sg200x, path, mode) == -1) { + if(soc_sysfs_set_gpio_interrupt_mode(sg2002, path, mode) == -1) { return -1; } sprintf(path, "/sys/devices/platform/%x.gpio/gpiochip%d/gpio/gpio%d/value", gpio_register_physical_address[pin->gpio_group], pin->gpio_group, pin->num); - if((pin->fd = soc_sysfs_gpio_reset_value(sg200x, path)) == -1) { + if((pin->fd = soc_sysfs_gpio_reset_value(sg2002, path)) == -1) { return -1; } @@ -366,37 +366,37 @@ static int sg200xISR(int i, enum isr_mode_t mode) { return 0; } -static int sg200xWaitForInterrupt(int i, int ms) { +static int sg2002WaitForInterrupt(int i, int ms) { struct layout_t *pin = NULL; - if((pin = sg200xGetIrqLayout(i)) == NULL) { + if((pin = sg2002GetIrqLayout(i)) == NULL) { return -1; } if(pin->mode != PINMODE_INTERRUPT) { - wiringXLog(LOG_ERR, "The %s %s GPIO %d is not set to interrupt mode", sg200x->brand, sg200x->chip, i); + wiringXLog(LOG_ERR, "The %s %s GPIO %d is not set to interrupt mode", sg2002->brand, sg2002->chip, i); return -1; } - return soc_wait_for_interrupt(sg200x, pin->fd, ms); + return soc_wait_for_interrupt(sg2002, pin->fd, ms); } -static int sg200xGC(void) { +static int sg2002GC(void) { struct layout_t *pin = NULL; char path[PATH_MAX]; int i = 0; memset(path, 0, sizeof(path)); - if(sg200x->map != NULL) { - for(i = 0; i < sg200x->map_size; i++) { - pin = &sg200x->layout[sg200x->map[i]]; + if(sg2002->map != NULL) { + for(i = 0; i < sg2002->map_size; i++) { + pin = &sg2002->layout[sg2002->map[i]]; if(pin->mode == PINMODE_OUTPUT) { pinMode(i, PINMODE_INPUT); } else if(pin->mode == PINMODE_INTERRUPT) { sprintf(path, "/sys/class/gpio/gpio%d", pin->num); - if((soc_sysfs_check_gpio(sg200x, path)) == 0) { + if((soc_sysfs_check_gpio(sg2002, path)) == 0) { sprintf(path, "/sys/class/gpio/unexport"); - soc_sysfs_gpio_unexport(sg200x, path, pin->num); + soc_sysfs_gpio_unexport(sg2002, path, pin->num); } } @@ -408,30 +408,30 @@ static int sg200xGC(void) { } if(pinmux_register_virtual_address != NULL) { - munmap(pinmux_register_virtual_address, sg200x->page_size); + munmap(pinmux_register_virtual_address, sg2002->page_size); pinmux_register_virtual_address = NULL; } - for(i = 0; i < SG200X_GPIO_GROUP_COUNT; i++) { - if(sg200x->gpio[i] != NULL) { - munmap(sg200x->gpio[i], sg200x->page_size); - sg200x->gpio[i] = NULL; + for(i = 0; i < SG2002_GPIO_GROUP_COUNT; i++) { + if(sg2002->gpio[i] != NULL) { + munmap(sg2002->gpio[i], sg2002->page_size); + sg2002->gpio[i] = NULL; } } return 0; } -static int sg200xSelectableFd(int i) { +static int sg2002SelectableFd(int i) { struct layout_t *pin = NULL; - if((pin = sg200xGetIrqLayout(i)) == NULL) { + if((pin = sg2002GetIrqLayout(i)) == NULL) { return -1; } return pin->fd; } -int sg200x_sysfs_pwm_set_long(struct soc_t *soc, char *path, long value) { +int sg2002_sysfs_pwm_set_long(struct soc_t *soc, char *path, long value) { char out[16]; int fd = 0; if((fd = open(path, O_WRONLY)) <= 0) { @@ -449,7 +449,7 @@ int sg200x_sysfs_pwm_set_long(struct soc_t *soc, char *path, long value) { return 0; } -int sg200x_sysfs_pwm_set_string(struct soc_t *soc, char *path, char *str) { +int sg2002_sysfs_pwm_set_string(struct soc_t *soc, char *path, char *str) { int fd = 0; if ((fd = open(path, O_WRONLY)) <= 0) { wiringXLog(LOG_ERR, "The %s %s cannot open %s for PWM (%s)", soc->brand, soc->chip, path, strerror(errno)); @@ -474,7 +474,7 @@ pwmchip4 -> pwm4, pwm5, pwm6, pwm7 pwmchip8 -> pwm8, pwm9, pwm10,pwm11 pwmchip12 -> pwm12,pwm13,pwm14,pwm15 */ -static int sg200x_get_pwm(int pin, int *chip, int *index) { +static int sg2002_get_pwm(int pin, int *chip, int *index) { int i; int found = 0; int pwm; @@ -505,11 +505,11 @@ static int sg200x_get_pwm(int pin, int *chip, int *index) { return pwm; } -static int sg200xSetPWMPeriod(int pin, long period) { +static int sg2002SetPWMPeriod(int pin, long period) { int chip = 0; int index = 0; char path[PATH_MAX]; - int pwm = sg200x_get_pwm(pin, &chip, &index); + int pwm = sg2002_get_pwm(pin, &chip, &index); if (pwm < 0) { wiringXLog(LOG_ERR, "[%s:%d] get pwm for pin(%d) failed!", __func__, __LINE__, pin); @@ -521,26 +521,26 @@ static int sg200xSetPWMPeriod(int pin, long period) { //wiringXLog(LOG_INFO, "[%s:%d], GP%d/PWM%d(chip:%d,index:%d), period: %ld", __func__, __LINE__, pin, pwm, chip, index, period); sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d", chip, index); - if ((soc_sysfs_check_gpio(sg200x, path)) == -1) { + if ((soc_sysfs_check_gpio(sg2002, path)) == -1) { sprintf(path, "/sys/class/pwm/pwmchip%d/export", chip); - if (soc_sysfs_gpio_export(sg200x, path, index) == -1) { + if (soc_sysfs_gpio_export(sg2002, path, index) == -1) { return -1; } } sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d/period", chip, index); - if (sg200x_sysfs_pwm_set_long(sg200x, path, period) == -1) { + if (sg2002_sysfs_pwm_set_long(sg2002, path, period) == -1) { return -1; } return 0; } -static int sg200xSetPWMDuty(int pin, long duty_cycle) { +static int sg2002SetPWMDuty(int pin, long duty_cycle) { int chip = 0; int index = 0; char path[PATH_MAX]; - int pwm = sg200x_get_pwm(pin, &chip, &index); + int pwm = sg2002_get_pwm(pin, &chip, &index); if (pwm < 0) { wiringXLog(LOG_ERR, "[%s:%d] get pwm for pin(%d) failed!", __func__, __LINE__, pin); @@ -550,15 +550,15 @@ static int sg200xSetPWMDuty(int pin, long duty_cycle) { //wiringXLog(LOG_INFO, "[%s:%d], GP%d/PWM%d(chip:%d,index:%d), duty_cycle: %ld", __func__, __LINE__, pin, pwm, chip, index, duty_cycle); sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d", chip, index); - if ((soc_sysfs_check_gpio(sg200x, path)) == -1) { + if ((soc_sysfs_check_gpio(sg2002, path)) == -1) { sprintf(path, "/sys/class/pwm/pwmchip%d/export", chip); - if (soc_sysfs_gpio_export(sg200x, path, index) == -1) { + if (soc_sysfs_gpio_export(sg2002, path, index) == -1) { return -1; } } sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d/duty_cycle", chip, index); - if (sg200x_sysfs_pwm_set_long(sg200x, path, duty_cycle) == -1) { + if (sg2002_sysfs_pwm_set_long(sg2002, path, duty_cycle) == -1) { return -1; } @@ -569,12 +569,12 @@ static int sg200xSetPWMDuty(int pin, long duty_cycle) { 0 - normal 1 - inversed */ -static int sg200xSetPWMPolarity(int pin, int polarity) { +static int sg2002SetPWMPolarity(int pin, int polarity) { int chip = 0; int index = 0; char path[PATH_MAX]; char polarity_str[16]; - int pwm = sg200x_get_pwm(pin, &chip, &index); + int pwm = sg2002_get_pwm(pin, &chip, &index); if (pwm < 0) { wiringXLog(LOG_ERR, "[%s:%d] get pwm for pin(%d) failed!", __func__, __LINE__, pin); @@ -586,9 +586,9 @@ static int sg200xSetPWMPolarity(int pin, int polarity) { //wiringXLog(LOG_INFO, "[%s:%d], GP%d/PWM%d(chip:%d,index:%d), polarity: %ld", __func__, __LINE__, pin, pwm, chip, index, polarity); sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d", chip, index); - if ((soc_sysfs_check_gpio(sg200x, path)) == -1) { + if ((soc_sysfs_check_gpio(sg2002, path)) == -1) { sprintf(path, "/sys/class/pwm/pwmchip%d/export", chip); - if(soc_sysfs_gpio_export(sg200x, path, index) == -1) { + if(soc_sysfs_gpio_export(sg2002, path, index) == -1) { return -1; } } @@ -601,18 +601,18 @@ static int sg200xSetPWMPolarity(int pin, int polarity) { sprintf(polarity_str, "inversed"); } - if (sg200x_sysfs_pwm_set_string(sg200x, path, polarity_str) == -1) { + if (sg2002_sysfs_pwm_set_string(sg2002, path, polarity_str) == -1) { return -1; } return 0; } -static int sg200xEnablePWM(int pin, int enable) { +static int sg2002EnablePWM(int pin, int enable) { int chip = 0; int index = 0; char path[PATH_MAX]; - int pwm = sg200x_get_pwm(pin, &chip, &index); + int pwm = sg2002_get_pwm(pin, &chip, &index); if (pwm < 0) { wiringXLog(LOG_ERR, "[%s:%d] get pwm for pin(%d) failed!", __func__, __LINE__, pin); @@ -622,44 +622,44 @@ static int sg200xEnablePWM(int pin, int enable) { //wiringXLog(LOG_INFO, "[%s:%d], GP%d/PWM%d(chip:%d,index:%d), enable: %ld", __func__, __LINE__, pin, pwm, chip, index, enable); sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d", chip, index); - if ((soc_sysfs_check_gpio(sg200x, path)) == -1) { + if ((soc_sysfs_check_gpio(sg2002, path)) == -1) { sprintf(path, "/sys/class/pwm/pwmchip%d/export", chip); - if (soc_sysfs_gpio_export(sg200x, path, index) == -1) { + if (soc_sysfs_gpio_export(sg2002, path, index) == -1) { return -1; } } sprintf(path, "/sys/class/pwm/pwmchip%d/pwm%d/enable", chip, index); - if (sg200x_sysfs_pwm_set_long(sg200x, path, enable) == -1) { + if (sg2002_sysfs_pwm_set_long(sg2002, path, enable) == -1) { return -1; } return 0; } -void sg200xInit(void) { - soc_register(&sg200x, "Sophgo", "SG200X"); - - sg200x->layout = layout; - - sg200x->support.isr_modes = ISR_MODE_RISING | ISR_MODE_FALLING | ISR_MODE_BOTH | ISR_MODE_NONE; - sg200x->page_size = (1024*4); - memcpy(sg200x->base_addr, gpio_register_physical_address, sizeof(gpio_register_physical_address)); - - sg200x->gc = &sg200xGC; - sg200x->selectableFd = &sg200xSelectableFd; - sg200x->pinMode = &sg200xPinMode; - sg200x->setup = &sg200xSetup; - sg200x->digitalRead = &sg200xDigitalRead; - sg200x->digitalWrite = &sg200xDigitalWrite; - sg200x->getPinName = &sg200xGetPinName; - sg200x->setMap = &sg200xSetMap; - sg200x->setIRQ = &sg200xSetIRQ; - sg200x->isr = &sg200xISR; - sg200x->waitForInterrupt = &sg200xWaitForInterrupt; +void sg2002Init(void) { + soc_register(&sg2002, "Sophgo", "SG2002"); + + sg2002->layout = layout; + + sg2002->support.isr_modes = ISR_MODE_RISING | ISR_MODE_FALLING | ISR_MODE_BOTH | ISR_MODE_NONE; + sg2002->page_size = (1024*4); + memcpy(sg2002->base_addr, gpio_register_physical_address, sizeof(gpio_register_physical_address)); + + sg2002->gc = &sg2002GC; + sg2002->selectableFd = &sg2002SelectableFd; + sg2002->pinMode = &sg2002PinMode; + sg2002->setup = &sg2002Setup; + sg2002->digitalRead = &sg2002DigitalRead; + sg2002->digitalWrite = &sg2002DigitalWrite; + sg2002->getPinName = &sg2002GetPinName; + sg2002->setMap = &sg2002SetMap; + sg2002->setIRQ = &sg2002SetIRQ; + sg2002->isr = &sg2002ISR; + sg2002->waitForInterrupt = &sg2002WaitForInterrupt; - sg200x->socSetPWMPeriod = &sg200xSetPWMPeriod; - sg200x->socSetPWMDuty = &sg200xSetPWMDuty; - sg200x->socSetPWMPolarity = &sg200xSetPWMPolarity; - sg200x->socEnablePWM = &sg200xEnablePWM; + sg2002->socSetPWMPeriod = &sg2002SetPWMPeriod; + sg2002->socSetPWMDuty = &sg2002SetPWMDuty; + sg2002->socSetPWMPolarity = &sg2002SetPWMPolarity; + sg2002->socEnablePWM = &sg2002EnablePWM; } diff --git a/src/soc/sophgo/sg200x.h b/src/soc/sophgo/sg2002.h similarity index 81% rename from src/soc/sophgo/sg200x.h rename to src/soc/sophgo/sg2002.h index dbb374c..e432ffb 100644 --- a/src/soc/sophgo/sg200x.h +++ b/src/soc/sophgo/sg2002.h @@ -10,13 +10,13 @@ file, You can obtain one at http://mozilla.org/MPL/2.0/. */ -#ifndef __WIRINGX_SG200X_H -#define __WIRINGX_SG200X_H +#ifndef __WIRINGX_SG2002_H +#define __WIRINGX_SG2002_H #include "common.h" -extern struct soc_t *sg200x; +extern struct soc_t *sg2002; -void sg200xInit(void); +void sg2002Init(void); #endif diff --git a/src/wiringx.c b/src/wiringx.c index d89ff9e..9cae5c6 100644 --- a/src/wiringx.c +++ b/src/wiringx.c @@ -41,7 +41,7 @@ #include "soc/rockchip/rk3399.h" #include "soc/rockchip/rk3588.h" #include "soc/sophgo/cv180x.h" -#include "soc/sophgo/sg200x.h" +#include "soc/sophgo/sg2002.h" #include "soc/sophgo/sg2000.h" #include "platform/linksprite/pcduino1.h" @@ -251,7 +251,7 @@ static void wiringXInit(void) { rk3399Init(); rk3588Init(); cv180xInit(); - sg200xInit(); + sg2002Init(); sg2000Init(); /* Init all platforms */