FPGA : Field-Programmable Gate Array Architectures

This repository has files that were implemented by myself during the summer semester in 2020 at the University of Jordan.

These files are : Assignments' Codes. Final Project Files.

Dscription:

The Supervisor for this course was Dr. Musa Al-Yaman

• Mechatroincs Engineering Department
• The University of Jordan

Assignment # 1 :

• Implement a counter that goes through the state sequence.

  000 > 001 > 011 > 010 > 110 > 111 > 101 > 100 > 000 > ...

Assignment # 2 :

• 8-bit Adder

Assignement # 3 :

• Low Priority Encoder 16 to 4.

Assignment # 4 :

• linear-feedback shift register (LFSR)
  • Implement Random bit generator

Assignment # 5 :

• Multipler
• gcd

Assignment # 6 :

• Implementing testbench for gcd

Assignment # 7 :

• Implementing sram and its test benchtest ** Special thanks to Muhammad Arslan since he contribute to this assignemnt with me.

Assignement # 8:

• Implementing hvsync_generator + adding vga demo

Project:

• Project's Report
• Project's Presentation
• Project's Code

Students who work on project :

• Muhammad Al-Barham
• Zeina abdelaziz
• Muhammad Arslan
• Saed Al-Nabelse
• Mohannad Atiyeh

• Supervisor : Dr.Musa Al-Yaman

Note: The project may has some bugs. it works on simulation, but we did't have a chance to test it on hardware kit (since we were in Covid-19 situation).