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1. Network-On-Chip Network-On-Chip Public

   RTL design and implementation of a 4x4 Network-on-Chip (NoC) with a mesh topology. This project includes SystemVerilog modules for buffer units, routing units, switch allocators, switches, routers,…

   SystemVerilog 7 1

2. Systolic-Array Systolic-Array Public

   RTL design of Systolic Arrays for matrix multiplication.

   C++ 1

3. Parallel-Programming-Course Parallel-Programming-Course Public

   This repository contains the projects completed in the Parallel Programming course at the University of Tehran.

   2

4. MIPS-Multicycle MIPS-Multicycle Public

   The Multi-cycle verilog description of MIPS processor

   Verilog

5. MD5-Algorithm-Implementation MD5-Algorithm-Implementation Public

   This repository contains the computer assignment developed for the System-Level Design lecture within the Digital Logic Design course at the University of Tehran.