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The protocol specifies the layout as of DAC points as control, x, y, i, r, g, b, etc, however physical DACs seem to expect this order instead: control, x, y, r, g, b, i, etc. Not sure if this is a bug that has been fixed in newer DACs or if all DACs will expect this point layout and we should fix our protocol implementation.
The text was updated successfully, but these errors were encountered:
mitchmindtree
changed the title
Colour byte order in protocol differs from implementation in physical DACs
DAC point memory layout in protocol differs from implementation in physical DACs
Jun 8, 2018
If you're running into this issue, use the colour_layout branch.
We'll test the latest ether-dream DAC within the next couple of weeks and if that also uses the differing point layout, I'll merge the color_layout branch into master.
The protocol specifies the layout as of DAC points as
control, x, y, i, r, g, b, etc
, however physical DACs seem to expect this order instead:control, x, y, r, g, b, i, etc
. Not sure if this is a bug that has been fixed in newer DACs or if all DACs will expect this point layout and we should fix our protocol implementation.The text was updated successfully, but these errors were encountered: