Process completed with exit code 1.

See https://docs.zephyrproject.org/latest/contribute/guidelines.html#clang-format for more details. You may want to run clang-format on this change: -#define PWM_MEMORY_SECTION(idx) \ - COND_CODE_1(PWM_HAS_PROP(idx, memory_regions), \ - (__attribute__((__section__(LINKER_DT_NODE_REGION_NAME( \ - PWM_MEM_REGION(idx)))))), \ +#define PWM_MEMORY_SECTION(idx) \ + COND_CODE_1( \ + PWM_HAS_PROP(idx, memory_regions), \ + (__attribute__((__section__(LINKER_DT_NODE_REGION_NAME(PWM_MEM_REGION(idx)))))), \ ()) -#define PWM_GET_MEM_ATTR(idx) \ - COND_CODE_1(PWM_HAS_PROP(idx, memory_regions), \ - (DT_PROP_OR(PWM_MEM_REGION(idx), zephyr_memory_attr, 0)), (0)) - -#define PWM_NRFX_DEVICE(idx) \ - NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(PWM(idx)); \ - static struct pwm_nrfx_data pwm_nrfx_##idx##_data; \ - static uint16_t pwm_##idx##_seq_values[NRF_PWM_CHANNEL_COUNT] \ - PWM_MEMORY_SECTION(idx); \ - PINCTRL_DT_DEFINE(PWM(idx)); \ - static const struct pwm_nrfx_config pwm_nrfx_##idx##_config = { \ - .pwm = NRFX_PWM_INSTANCE(idx), \ - .initial_config = { \ - .skip_gpio_cfg = true, \ - .skip_psel_cfg = true, \ - .base_clock = NRF_PWM_CLK_1MHz, \ - .count_mode = (PWM_PROP(idx, center_aligned) \ - ? NRF_PWM_MODE_UP_AND_DOWN \ - : NRF_PWM_MODE_UP), \ - .top_value = 1000, \ - .load_mode = NRF_PWM_LOAD_INDIVIDUAL, \ - .step_mode = NRF_PWM_STEP_TRIGGERED, \ - }, \ - .seq.values.p_raw = pwm_##idx##_seq_values, \ - .seq.length = NRF_PWM_CHANNEL_COUNT, \ - .pcfg = PINCTRL_DT_DEV_CONFIG_GET(PWM(idx)), \ - .clock_freq = COND_CODE_1(DT_CLOCKS_HAS_IDX(PWM(idx), 0), \ - (DT_PROP(DT_CLOCKS_CTLR(PWM(idx)), clock_frequency)), \ - (16ul * 1000ul * 1000ul)), \ - IF_ENABLED(CONFIG_DCACHE, \ - (.mem_attr = PWM_GET_MEM_ATTR(idx),)) \ - }; \ - static int pwm_nrfx_init##idx(const struct device *dev) \ - { \ - IRQ_CONNECT(DT_IRQN(PWM(idx)), DT_IRQ(PWM(idx), priority), \ - nrfx_isr, nrfx_pwm_##idx##_irq_handler, 0); \ - return pwm_nrfx_init(dev); \ - }; \ - PM_DEVICE_DT_DEFINE(PWM(idx), pwm_nrfx_pm_action); \ - DEVICE_DT_DEFINE(PWM(idx), \ - pwm_nrfx_init##idx, PM_DEVICE_DT_GET(PWM(idx)), \ - &pwm_nrfx_##idx##_data, \ - &pwm_nrfx_##idx##_config, \ - POST_KERNEL, CONFIG_PWM_INIT_PRIORITY, \ - &pwm_nrfx_drv_api_funcs) +#define PWM_GET_MEM_ATTR(idx) \ + COND_CODE_1(PWM_HAS_PROP(idx, memory_regions), \ + (DT_PROP_OR(PWM_MEM_REGION(idx), zephyr_memory_attr, 0)), (0)) + +#define PWM_NRFX_DEVICE(idx) \ + NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(PWM(idx)); \ + static struct pwm_nrfx_data pwm_nrfx_##idx##_data; \ + static uint16_t pwm_##idx##_seq_values[NRF_PWM_CHANNEL_COUNT] PWM_MEMORY_SECTION(idx); \ + PINCTRL_DT_DEFINE(PWM(idx)); \ + static const struct pwm_nrfx_config pwm_nrfx_##idx##_config = { \ + .pwm = NRFX_PWM_INSTANCE(idx), \ + .initial_config = \ + { \ + .skip_gpio_cfg = true, \ + .skip_psel_cfg = true,