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Misc nRF54H20 updates #1681

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merged 17 commits into from
May 14, 2024
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7aafe97
Revert "[nrf fromlist] drivers: timer: grtc: Update GRTC driver"
57300 May 6, 2024
227888b
Revert "[nrf fromtree] dts: nordic: add EXMIF peripheral description …
57300 May 10, 2024
40ce4c0
[nrf fromtree] modules: hal_nordic: Fix NRF_GRTC_HAS_EXTENDED
57300 Apr 16, 2024
74ab138
[nrf fromtree] dts: nordic: nrf54h20: Add SysCtrl VEVIF node
57300 Apr 9, 2024
51f1389
[nrf fromtree] boards: nordic: nrf54h20dk: Add IPC configuration for …
57300 Apr 9, 2024
616feee
[nrf fromtree] drivers/timer grtc: Fix for ISR prototype
aescolar Apr 18, 2024
fe08313
[nrf fromtree] soc: nordic: vpr: fix soc isr sw stacking.
lstnl Apr 18, 2024
6f4c130
[nrf fromtree] dts: nordic: add USBHS node for nrf54h20
hakonfam Apr 19, 2024
e0a57a8
[nrf fromtree] dts: nordic: add EXMIF peripheral description to nRF54H20
e-rk Apr 26, 2024
de7f6f9
[nrf fromlist] soc: nordic: nrf54h20: Make HSFLL trims optional
57300 Apr 16, 2024
033e1a4
[nrf fromlist] soc: nordic: nrf54h20: Use KERNEL_INIT_PRIORITY_DEFAULT
57300 Apr 16, 2024
495c14e
[nrf fromlist] soc: nordic: Extend address validation for nRF54H20
57300 Apr 16, 2024
8b17c55
[nrf fromlist] dts: nordic: Add RESETINFO
57300 Apr 17, 2024
d5909d6
[nrf fromlist] drivers: timer: grtc: Update GRTC driver
adamkondraciuk Dec 19, 2023
c382cd4
[nrf fromlist] tests: drivers: timer: grtc: Fix GRTC test
adamkondraciuk Feb 1, 2024
6895e24
[nrf fromlist] boards: nrf54h20dk: Drop shared_ram20_region's compatible
57300 May 3, 2024
f077b64
[nrf noup] boards: nordic: nrf54h20dk: Add aliases for RESETINFO
57300 Apr 17, 2024
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14 changes: 14 additions & 0 deletions boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20-ipc_conf.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -27,11 +27,25 @@
<&cpurad_bellboard 12>;
};

cpuapp_cpusys_ipc: ipc-2-12 {
compatible = "zephyr,ipc-icmsg";
status = "disabled";
mboxes = <&cpuapp_bellboard 6>,
<&cpusys_vevif 12>;
};

cpuapp_cpuppr_ipc: ipc-2-13 {
compatible = "zephyr,ipc-icmsg";
status = "disabled";
mboxes = <&cpuapp_bellboard 13>,
<&cpuppr_vevif 12>;
};

cpurad_cpusys_ipc: ipc-3-12 {
compatible = "zephyr,ipc-icmsg";
status = "disabled";
mboxes = <&cpurad_bellboard 6>,
<&cpusys_vevif 18>;
};
};
};
11 changes: 9 additions & 2 deletions boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuapp.dts
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@
#include "nrf54h20dk_nrf54h20-ipc_conf.dtsi"
#include "nrf54h20dk_nrf54h20-pinctrl.dtsi"

/delete-node/ &cpurad_cpusys_ipc;
/delete-node/ &cpusec_cpurad_ipc;

/ {
Expand Down Expand Up @@ -120,8 +121,8 @@
status = "okay";
interrupts = <96 NRF_DEFAULT_IRQ_PRIORITY>;
interrupt-names = "irq0";
/* irq0: 0: cpuapp-cpusec, 13: cpuapp-cpuppr, 18: cpuapp-cpurad */
nordic,interrupt-mapping = <0x00042001 0>;
/* irq0: 0: cpuapp-cpusec, 6: cpuapp-cpusys, 13: cpuapp-cpuppr, 18: cpuapp-cpurad */
nordic,interrupt-mapping = <0x00042041 0>;
};

&cpurad_bellboard {
Expand All @@ -143,6 +144,12 @@ ipc0: &cpuapp_cpurad_ipc {
rx-blocks = <32>;
};

&cpuapp_cpusys_ipc {
mbox-names = "rx", "tx";
tx-region = <&cpuapp_cpusys_ipc_shm>;
rx-region = <&cpusys_cpuapp_ipc_shm>;
};

&cpuapp_cpuppr_ipc {
mbox-names = "rx", "tx";
tx-region = <&cpuapp_cpuppr_ipc_shm>;
Expand Down
2 changes: 2 additions & 0 deletions boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpuppr.dts
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,8 @@
#include "nrf54h20dk_nrf54h20-pinctrl.dtsi"

/delete-node/ &cpuapp_cpurad_ipc;
/delete-node/ &cpuapp_cpusys_ipc;
/delete-node/ &cpurad_cpusys_ipc;
/delete-node/ &cpusec_cpuapp_ipc;
/delete-node/ &cpusec_cpurad_ipc;

Expand Down
11 changes: 9 additions & 2 deletions boards/nordic/nrf54h20dk/nrf54h20dk_nrf54h20_cpurad.dts
Original file line number Diff line number Diff line change
Expand Up @@ -12,6 +12,7 @@
#include "nrf54h20dk_nrf54h20-pinctrl.dtsi"

/delete-node/ &cpuapp_cpuppr_ipc;
/delete-node/ &cpuapp_cpusys_ipc;
/delete-node/ &cpusec_cpuapp_ipc;

/ {
Expand Down Expand Up @@ -46,8 +47,8 @@
status = "okay";
interrupts = <96 NRF_DEFAULT_IRQ_PRIORITY>;
interrupt-names = "irq0";
/* irq0: 0: cpurad-cpusec, 12: cpurad-cpuapp */
nordic,interrupt-mapping = <0x00001001 0>;
/* irq0: 0: cpurad-cpusec, 6: cpurad-cpusys, 12: cpurad-cpuapp */
nordic,interrupt-mapping = <0x00001041 0>;
};

&cpuapp_bellboard {
Expand All @@ -69,6 +70,12 @@ ipc0: &cpuapp_cpurad_ipc {
rx-blocks = <32>;
};

&cpurad_cpusys_ipc {
mbox-names = "rx", "tx";
tx-region = <&cpurad_cpusys_ipc_shm>;
rx-region = <&cpusys_cpurad_ipc_shm>;
};

&cpurad_dma_region {
status = "okay";
};
Expand Down
13 changes: 1 addition & 12 deletions drivers/timer/Kconfig.nrf_grtc
Original file line number Diff line number Diff line change
Expand Up @@ -40,20 +40,9 @@ config NRF_GRTC_TIMER_CLOCK_MANAGEMENT
the GRTC. Usually this is only needed by the processor that is starting
the SYSCOUNTER, but can be shared by multiple processors in the system.

config NRF_GRTC_SYSCOUNTER_SLEEP_MINIMUM_LATENCY
config NRF_GRTC_SLEEP_MINIMUM_LATENCY
int
default 1000
depends on NRF_GRTC_SLEEP_ALLOWED
help
The value (in us) ensures that the wakeup event will not fire
too early. In other words, applying SYSCOUNTER sleep state for less than
NRF_GRTC_SYSCOUNTER_SLEEP_MINIMUM_LATENCY period makes no sense.

config NRF_GRTC_TIMER_AUTO_KEEP_ALIVE
bool
default y if NRF_GRTC_START_SYSCOUNTER
help
This feature prevents the SYSCOUNTER to sleep when any core is in
active state.

endif # NRF_GRTC_TIMER
90 changes: 69 additions & 21 deletions drivers/timer/nrf_grtc_timer.c
Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,12 @@

#define CHAN_COUNT NRFX_GRTC_CONFIG_NUM_OF_CC_CHANNELS
#define EXT_CHAN_COUNT (CHAN_COUNT - 1)
/* The reset value of waketime is 1, which doesn't seem to work.
* It's being looked into, but for the time being use 4.
* Timeout must always be higher than waketime, so setting that to 5.
*/
#define WAKETIME (4)
#define TIMEOUT (WAKETIME + 1)

#ifndef GRTC_SYSCOUNTERL_VALUE_Msk
#define GRTC_SYSCOUNTERL_VALUE_Msk GRTC_SYSCOUNTER_SYSCOUNTERL_VALUE_Msk
Expand All @@ -49,6 +55,9 @@

#define MAX_CYCLES (MAX_TICKS * CYC_PER_TICK)

/* The maximum SYSCOUNTERVALID settling time equals 1x32k cycles + 20x1MHz cycles. */
#define GRTC_SYSCOUNTERVALID_SETTLE_MAX_TIME_US 51

#if defined(CONFIG_TEST)
const int32_t z_sys_timer_irq_for_test = DT_IRQN(GRTC_NODE);
#endif
Expand All @@ -69,6 +78,36 @@ static nrfx_grtc_channel_t system_clock_channel_data = {
__ASSERT_NO_MSG((NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK & (1UL << (chan))) && \
((chan) != system_clock_channel_data.channel))

static inline void grtc_active_set(void)
{
#if defined(NRF_GRTC_HAS_SYSCOUNTER_ARRAY) && (NRF_GRTC_HAS_SYSCOUNTER_ARRAY == 1)
nrfy_grtc_sys_counter_active_set(NRF_GRTC, true);
while (!nrfy_grtc_sys_conter_ready_check(NRF_GRTC)) {
}
#else
nrfy_grtc_sys_counter_active_state_request_set(NRF_GRTC, true);
k_busy_wait(GRTC_SYSCOUNTERVALID_SETTLE_MAX_TIME_US);
#endif
}

static inline void grtc_wakeup(void)
{
if (IS_ENABLED(CONFIG_NRF_GRTC_SLEEP_ALLOWED)) {
grtc_active_set();
}
}

static inline void grtc_sleep(void)
{
if (IS_ENABLED(CONFIG_NRF_GRTC_SLEEP_ALLOWED)) {
#if defined(NRF_GRTC_HAS_SYSCOUNTER_ARRAY) && (NRF_GRTC_HAS_SYSCOUNTER_ARRAY == 1)
nrfy_grtc_sys_counter_active_set(NRF_GRTC, false);
#else
nrfy_grtc_sys_counter_active_state_request_set(NRF_GRTC, false);
#endif
}
}

static inline uint64_t counter_sub(uint64_t a, uint64_t b)
{
return (a - b);
Expand All @@ -77,7 +116,10 @@ static inline uint64_t counter_sub(uint64_t a, uint64_t b)
static inline uint64_t counter(void)
{
uint64_t now;

grtc_wakeup();
nrfx_grtc_syscounter_get(&now);
grtc_sleep();
return now;
}

Expand All @@ -99,8 +141,10 @@ static inline uint64_t get_comparator(uint32_t chan)
static void system_timeout_set(uint64_t value)
{
if (value <= NRF_GRTC_SYSCOUNTER_CCADD_MASK) {
grtc_wakeup();
nrfx_grtc_syscounter_cc_relative_set(&system_clock_channel_data, value, true,
NRFX_GRTC_CC_RELATIVE_SYSCOUNTER);
grtc_sleep();
} else {
nrfx_grtc_syscounter_cc_absolute_set(&system_clock_channel_data, value + counter(),
true);
Expand Down Expand Up @@ -329,7 +373,6 @@ int z_nrf_grtc_timer_capture_read(int32_t chan, uint64_t *captured_time)
*/

uint64_t capt_time;
nrfx_err_t result;

IS_CHANNEL_ALLOWED_ASSERT(chan);

Expand All @@ -340,10 +383,8 @@ int z_nrf_grtc_timer_capture_read(int32_t chan, uint64_t *captured_time)
*/
return -EBUSY;
}
result = nrfx_grtc_syscounter_cc_value_read(chan, &capt_time);
if (result != NRFX_SUCCESS) {
return -EPERM;
}

capt_time = nrfy_grtc_sys_counter_cc_get(NRF_GRTC, chan);

__ASSERT_NO_MSG(capt_time < COUNTER_SPAN);

Expand All @@ -358,22 +399,16 @@ int z_nrf_grtc_wakeup_prepare(uint64_t wake_time_us)
nrfx_err_t err_code;
static uint8_t systemoff_channel;
uint64_t now = counter();
nrfx_grtc_sleep_config_t sleep_cfg;
/* Minimum time that ensures valid execution of system-off procedure. */
uint32_t minimum_latency_us;
uint32_t minimum_latency_us = nrfy_grtc_waketime_get(NRF_GRTC) +
nrfy_grtc_timeout_get(NRF_GRTC) +
CONFIG_NRF_GRTC_SLEEP_MINIMUM_LATENCY;
uint32_t chan;
int ret;

nrfx_grtc_sleep_configuration_get(&sleep_cfg);
minimum_latency_us = (sleep_cfg.waketime + sleep_cfg.timeout) * USEC_PER_SEC / 32768 +
CONFIG_NRF_GRTC_SYSCOUNTER_SLEEP_MINIMUM_LATENCY;
sleep_cfg.auto_mode = false;
nrfx_grtc_sleep_configure(&sleep_cfg);

if (minimum_latency_us > wake_time_us) {
return -EINVAL;
}

k_spinlock_key_t key = k_spin_lock(&lock);

err_code = nrfx_grtc_channel_alloc(&systemoff_channel);
Expand All @@ -382,9 +417,7 @@ int z_nrf_grtc_wakeup_prepare(uint64_t wake_time_us)
return -ENOMEM;
}
(void)nrfx_grtc_syscounter_cc_int_disable(systemoff_channel);
ret = compare_set(systemoff_channel,
now + wake_time_us * sys_clock_hw_cycles_per_sec() / USEC_PER_SEC, NULL,
NULL);
ret = compare_set(systemoff_channel, now + wake_time_us, NULL, NULL);
if (ret < 0) {
k_spin_unlock(&lock, key);
return ret;
Expand All @@ -400,7 +433,7 @@ int z_nrf_grtc_wakeup_prepare(uint64_t wake_time_us)
}

/* Make sure that wake_time_us was not triggered yet. */
if (nrfx_grtc_syscounter_compare_event_check(systemoff_channel)) {
if (nrfy_grtc_sys_counter_compare_event_check(NRF_GRTC, systemoff_channel)) {
k_spin_unlock(&lock, key);
return -EINVAL;
}
Expand All @@ -411,7 +444,7 @@ int z_nrf_grtc_wakeup_prepare(uint64_t wake_time_us)
MAX_CC_LATCH_WAIT_TIME_US;
k_busy_wait(wait_time);
#if NRF_GRTC_HAS_CLKSEL
nrfx_grtc_clock_source_set(NRF_GRTC_CLKSEL_LFXO);
nrfy_grtc_clksel_set(NRF_GRTC, NRF_GRTC_CLKSEL_LFXO);
#endif
k_spin_unlock(&lock, key);
return 0;
Expand Down Expand Up @@ -452,10 +485,18 @@ static int sys_clock_driver_init(void)
#if defined(CONFIG_NRF_GRTC_TIMER_CLOCK_MANAGEMENT) && \
(defined(NRF_GRTC_HAS_CLKSEL) && (NRF_GRTC_HAS_CLKSEL == 1))
/* Use System LFCLK as the low-frequency clock source. */
nrfx_grtc_clock_source_set(NRF_GRTC_CLKSEL_LFCLK);
nrfy_grtc_clksel_set(NRF_GRTC, NRF_GRTC_CLKSEL_LFCLK);
#endif

IRQ_CONNECT(DT_IRQN(GRTC_NODE), DT_IRQ(GRTC_NODE, priority), nrfx_grtc_irq_handler, 0, 0);
#if defined(CONFIG_NRF_GRTC_START_SYSCOUNTER)
/* SYSCOUNTER needs to be turned off before initialization. */
nrfy_grtc_sys_counter_set(NRF_GRTC, false);
nrfy_grtc_timeout_set(NRF_GRTC, TIMEOUT);
nrfy_grtc_waketime_set(NRF_GRTC, WAKETIME);
#endif /* CONFIG_NRF_GRTC_START_SYSCOUNTER */

IRQ_CONNECT(DT_IRQN(GRTC_NODE), DT_IRQ(GRTC_NODE, priority), nrfx_isr,
nrfx_grtc_irq_handler, 0);

err_code = nrfx_grtc_init(0);
if (err_code != NRFX_SUCCESS) {
Expand All @@ -467,13 +508,20 @@ static int sys_clock_driver_init(void)
if (err_code != NRFX_SUCCESS) {
return err_code == NRFX_ERROR_NO_MEM ? -ENOMEM : -EPERM;
}
if (IS_ENABLED(CONFIG_NRF_GRTC_SLEEP_ALLOWED)) {
nrfy_grtc_sys_counter_auto_mode_set(NRF_GRTC, false);
}
#else
err_code = nrfx_grtc_channel_alloc(&system_clock_channel_data.channel);
if (err_code != NRFX_SUCCESS) {
return -ENOMEM;
}
#endif /* CONFIG_NRF_GRTC_START_SYSCOUNTER */

if (!IS_ENABLED(CONFIG_NRF_GRTC_SLEEP_ALLOWED)) {
grtc_active_set();
}

int_mask = NRFX_GRTC_CONFIG_ALLOWED_CC_CHANNELS_MASK;
if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
system_timeout_set(CYC_PER_TICK);
Expand Down
1 change: 1 addition & 0 deletions dts/arm/nordic/nrf54h20_cpuapp.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@ cpu: &cpuapp {};
systick: &cpuapp_systick {};
nvic: &cpuapp_nvic {};
cpuppr_vevif: &cpuppr_vevif_remote {};
cpusys_vevif: &cpusys_vevif_remote {};

/delete-node/ &cpuppr;
/delete-node/ &cpurad;
Expand Down
1 change: 1 addition & 0 deletions dts/arm/nordic/nrf54h20_cpurad.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@ cpu: &cpurad {};
systick: &cpurad_systick {};
nvic: &cpurad_nvic {};
cpuppr_vevif: &cpuppr_vevif_remote {};
cpusys_vevif: &cpusys_vevif_remote {};

/delete-node/ &cpuapp;
/delete-node/ &cpuapp_peripherals;
Expand Down
17 changes: 17 additions & 0 deletions dts/common/nordic/nrf54h20.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -300,6 +300,14 @@
#size-cells = <1>;
ranges = <0x0 0x5f000000 0x1000000>;

usbhs: usbhs@86000 {
compatible = "snps,dwc2";
reg = <0x86000 0x1000>, <0x2f700000 0x40000>;
reg-names = "wrapper", "core";
interrupts = <134 NRF_DEFAULT_IRQ_PRIORITY>;
status = "disabled";
};

exmif: spi@95000 {
compatible = "nordic,nrf-exmif", "snps,designware-spi";
#address-cells = <1>;
Expand Down Expand Up @@ -331,6 +339,15 @@
#mbox-cells = <1>;
};

cpusys_vevif_remote: mailbox@8c8000 {
compatible = "nordic,nrf-vevif-remote";
reg = <0x8c8000 0x1000>;
status = "disabled";
#mbox-cells = <1>;
nordic,tasks = <32>;
nordic,tasks-mask = <0xfffff0ff>;
};

ipct120: ipct@8d1000 {
compatible = "nordic,nrf-ipct-global";
reg = <0x8d1000 0x1000>;
Expand Down
1 change: 1 addition & 0 deletions dts/riscv/nordic/nrf54h20_cpuppr.dtsi
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@
cpu: &cpuppr {};
clic: &cpuppr_clic {};
cpuppr_vevif: &cpuppr_vevif_local {};
cpusys_vevif: &cpusys_vevif_remote {};

/delete-node/ &cpuapp;
/delete-node/ &cpuapp_peripherals;
Expand Down
15 changes: 2 additions & 13 deletions modules/hal_nordic/nrfx/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -127,19 +127,8 @@ if(CONFIG_NRFX_TWI OR CONFIG_NRFX_TWIM)
zephyr_library_sources(${SRC_DIR}/nrfx_twi_twim.c)
endif()

if (CONFIG_NRF_GRTC_TIMER)
if (CONFIG_NRF_GRTC_TIMER_CLOCK_MANAGEMENT)
zephyr_library_compile_definitions(NRF_GRTC_HAS_EXTENDED=1)
endif()
if (CONFIG_NRF_GRTC_SLEEP_ALLOWED)
zephyr_compile_definitions(NRFX_GRTC_CONFIG_SLEEP_ALLOWED=1)
endif()
if (CONFIG_NRF_GRTC_TIMER_AUTO_KEEP_ALIVE)
zephyr_compile_definitions(NRFX_GRTC_CONFIG_AUTOEN=1)
endif()
if (CONFIG_NRF_GRTC_START_SYSCOUNTER)
zephyr_compile_definitions(NRFX_GRTC_CONFIG_AUTOSTART=1)
endif()
if (CONFIG_NRF_GRTC_TIMER AND CONFIG_NRF_GRTC_TIMER_CLOCK_MANAGEMENT)
zephyr_compile_definitions(NRF_GRTC_HAS_EXTENDED=1)
endif()

# Inject HAL "CONFIG_NFCT_PINS_AS_GPIOS" definition if user requests to
Expand Down
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