Updated clock to something greater than 1 Hz (10,000,000)

info.yaml

@@ -5,7 +5,7 @@ project:
   discord:      "beepboop2900"
   description:  "Displays 'dEFAULt123' on 7-segment LED"
   language:     "Verilog"
-  clock_hz:     1
+  clock_hz:     10000000
 
   # How many tiles your design occupies? A single tile is about 167x108 uM.
   tiles: "1x1"          # Valid values: 1x1, 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2