Apply MCUXpresso SDK 2.11.0 release

Signed-off-by: Susan Su <susan.su@nxp.com>

CMSIS/Core/Include/core_cm7.h

@@ -2317,14 +2317,6 @@ __STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int32_t isiz
   #endif
 }
 
-/*
- * Optimize the Data Cache functions, for the endless loop issue.
- * More details, see https://github.com/ARM-software/CMSIS_5/issues/620
- */
-#if (defined(__GNUC__) && !defined(__OPTIMIZE__))
-#pragma GCC push_options
-#pragma GCC optimize ("Og")
-#endif
 
 /**
   \brief   Enable D-Cache
@@ -2385,6 +2377,25 @@ __STATIC_FORCEINLINE void SCB_DisableDCache (void)
 
     ccsidr = SCB->CCSIDR;
 
+  #if (defined(__GNUC__) && !defined(__OPTIMIZE__))
+    /*
+     * For the endless loop issue with GCC O0.
+     * More details, see https://github.com/ARM-software/CMSIS_5/issues/620
+     *
+     * The issue only happens when local variables are in stack (GCC O0). If
+     * local variables are saved in general purpose register, then the function
+     * is OK.
+     *
+     * When local variables are in stack, after disabling the cache, flush the
+     * local variables cache line for data consistency.
+     */
+    /* Clean and invalidate the local variable cache. */
+    SCB->DCCIMVAC = (uint32_t)(&sets);
+    SCB->DCCIMVAC = (uint32_t)(&ways);
+    SCB->DCCIMVAC = (uint32_t)(&ccsidr);
+    __DSB();
+    __ISB();
+  #endif
                                             /* clean & invalidate D-Cache */
     sets = (uint32_t)(CCSIDR_SETS(ccsidr));
     do {
@@ -2508,9 +2519,6 @@ __STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
   #endif
 }
 
-#if (defined(__GNUC__) && !defined(__OPTIMIZE__))
-#pragma GCC pop_options
-#endif
 
 /**
   \brief   D-Cache Invalidate by address

CMSIS/DSP/CMSIS_DSP_Library.cmake

@@ -0,0 +1,12 @@
+#Description: CMSIS DSP Library; user_visible: True
+include_guard(GLOBAL)
+message("CMSIS_DSP_Library component is included.")
+
+target_sources(${MCUX_SDK_PROJECT_NAME} PRIVATE
+)
+
+target_include_directories(${MCUX_SDK_PROJECT_NAME} PUBLIC
+    ${CMAKE_CURRENT_LIST_DIR}/Include
+)
+
+

CMSIS/DSP/Include/arm_const_structs.h

@@ -0,0 +1,66 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_const_structs.h
+ * Description:  Constant structs that are initialized for user convenience.
+ *               For example, some can be given as arguments to the arm_cfft_f32() function.
+ *
+ * $Date:        27. January 2017
+ * $Revision:    V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_CONST_STRUCTS_H
+#define _ARM_CONST_STRUCTS_H
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
+
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
+
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
+
+#endif