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wip: bitblast shifts
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bollu committed Jun 10, 2024
1 parent f4f2c09 commit a9c0977
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16 changes: 16 additions & 0 deletions src/Init/Data/BitVec/Bitblast.lean
Original file line number Diff line number Diff line change
Expand Up @@ -235,4 +235,20 @@ theorem sle_eq_carry (x y : BitVec w) :
x.sle y = !((x.msb == y.msb).xor (carry w y (~~~x) true)) := by
rw [sle_eq_not_slt, slt_eq_not_carry, beq_comm]

/- ## Shift left for arbitrary bit width -/

def shiftLeftRec (x : BitVec w) (y : BitVec w) (n : Nat) : BitVec w :=
let val := if y.getLsb n then x <<< n else 0#w
match n with
| 0 => val
| n + 1 => val + shiftLeftRec val y n

@[simp]
theorem shiftLeftRec_zero (x y : BitVec w) :
shiftLeftRec x y 0 = if y.getLsb 0 then x else 0 := by
simp [shiftLeftRec]

theorem shiftLeftRec_eq (x y : BitVec w) (n : Nat) :
shiftLeftRec x y n = x <<< (y.truncate n).zeroExtend w := sorry

end BitVec

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