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feat: shiftRight bitblasting theorems #11

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@bollu bollu commented Jul 24, 2024

These theorems allow us to bitblast arithmetic and logical shift rights. The TODOS are yet to be addressed.

@bollu bollu changed the base branch from master to upstream-shiftLeft-recurrence July 24, 2024 14:03
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@bollu bollu force-pushed the upstream-shiftRight-recurrence branch from 185f53b to ffaa328 Compare July 30, 2024 19:17
@tobiasgrosser
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This did not lead to a clean PR? Maybe update origin/master and merge origin/master?

@bollu bollu force-pushed the upstream-shiftRight-recurrence branch from ffaa328 to 80e05d8 Compare July 30, 2024 19:28
@bollu bollu changed the base branch from upstream-shiftLeft-recurrence to master July 30, 2024 19:28
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bollu commented Jul 30, 2024

@tobiasgrosser clean now.

Comment on lines 449 to 450
theorem ushiftRight_eq' (x : BitVec w) (y : BitVec w₂) :
x >>> y = x >>> y.toNat := by rfl

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Suggested change
theorem ushiftRight_eq' (x : BitVec w) (y : BitVec w₂) :
x >>> y = x >>> y.toNat := by rfl
theorem ushiftRight_eq' (x : BitVec w) (y : BitVec w₂) :
x >>> y = x >>> y.toNat := by rfl

Comment on lines 471 to 472
theorem getLsb_ushiftRight' (x : BitVec w) (y : BitVec w₂) (i : Nat) :
(x >>> y).getLsb i = x.getLsb (y.toNat + i) := by
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Suggested change
theorem getLsb_ushiftRight' (x : BitVec w) (y : BitVec w₂) (i : Nat) :
(x >>> y).getLsb i = x.getLsb (y.toNat + i) := by
theorem getLsb_ushiftRight' (x : BitVec w) (y : BitVec w₂) (i : Nat) :
(x >>> y).getLsb i = x.getLsb (y.toNat + i) := by

Comment on lines 490 to 479
theorem shiftRight_eq_shiftRight_rec (x : BitVec ℘) (y : BitVec w₂) :
x >>> y = ushiftRight_rec x y (w₂ - 1) := by

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Suggested change
theorem shiftRight_eq_shiftRight_rec (x : BitVec ) (y : BitVec w₂) :
x >>> y = ushiftRight_rec x y (w₂ - 1) := by
theorem shiftRight_eq_shiftRight_rec (x : BitVec w₁) (y : BitVec w₂) :
x >>> y = ushiftRight_rec x y (w₂ - 1) := by

Comment on lines +498 to +487
def sshiftRightRec (x : BitVec w) (y : BitVec w₂) (n : Nat) : BitVec w :=
let shiftAmt := (y &&& (twoPow w₂ n))

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Suggested change
def sshiftRightRec (x : BitVec w) (y : BitVec w₂) (n : Nat) : BitVec w :=
let shiftAmt := (y &&& (twoPow w₂ n))
def sshiftRightRec (x : BitVec w) (y : BitVec w₂) (n : Nat) : BitVec w :=
let shiftAmt := (y &&& (twoPow w₂ n))

Comment on lines +505 to +494
theorem sshiftRightRec_zero_eq (x : BitVec w) (y : BitVec w₂) :
sshiftRightRec x y 0 = x.sshiftRight' (y &&& 1#w₂) := by

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Suggested change
theorem sshiftRightRec_zero_eq (x : BitVec w) (y : BitVec w₂) :
sshiftRightRec x y 0 = x.sshiftRight' (y &&& 1#w₂) := by
theorem sshiftRightRec_zero_eq (x : BitVec w) (y : BitVec w₂) :
sshiftRightRec x y 0 = x.sshiftRight' (y &&& 1#w₂) := by

Comment on lines +510 to +499
theorem sshiftRightRec_succ_eq (x : BitVec w) (y : BitVec w₂) (n : Nat) :
sshiftRightRec x y (n + 1) = (sshiftRightRec x y n).sshiftRight' (y &&& twoPow w₂ (n + 1)) := by

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Suggested change
theorem sshiftRightRec_succ_eq (x : BitVec w) (y : BitVec w₂) (n : Nat) :
sshiftRightRec x y (n + 1) = (sshiftRightRec x y n).sshiftRight' (y &&& twoPow w₂ (n + 1)) := by
theorem sshiftRightRec_succ_eq (x : BitVec w) (y : BitVec w₂) (n : Nat) :
sshiftRightRec x y (n + 1) = (sshiftRightRec x y n).sshiftRight' (y &&& twoPow w₂ (n + 1)) := by

Comment on lines +514 to +503
theorem sshiftRight_or_eq_sshiftRight_sshiftRight_of_and_eq_zero {x : BitVec w} {y z : BitVec w₂}
(h : y &&& z = 0#w₂) :

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Suggested change
theorem sshiftRight_or_eq_sshiftRight_sshiftRight_of_and_eq_zero {x : BitVec w} {y z : BitVec w₂}
(h : y &&& z = 0#w₂) :
theorem sshiftRight_or_eq_sshiftRight_sshiftRight_of_and_eq_zero {x : BitVec w} {y z : BitVec w₂}
(h : y &&& z = 0#w₂) :

Comment on lines +517 to +506
simp [sshiftRight', ← add_eq_or_of_and_eq_zero _ _ h,
toNat_add_of_and_eq_zero h, sshiftRight'_add]

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Suggested change
simp [sshiftRight', ← add_eq_or_of_and_eq_zero _ _ h,
toNat_add_of_and_eq_zero h, sshiftRight'_add]
simp [sshiftRight', ← add_eq_or_of_and_eq_zero _ _ h,
toNat_add_of_and_eq_zero h, sshiftRight'_add]

Comment on lines 465 to 454
theorem ushiftRight_or_eq_ushiftRight_ushiftRight_of_and_eq_zero {x : BitVec w} {y z : BitVec w₂}
(h : y &&& z = 0#w₂) :

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Suggested change
theorem ushiftRight_or_eq_ushiftRight_ushiftRight_of_and_eq_zero {x : BitVec w} {y z : BitVec w₂}
(h : y &&& z = 0#w₂) :
theorem ushiftRight_or_eq_ushiftRight_ushiftRight_of_and_eq_zero {x : BitVec w} {y z : BitVec w₂}
(h : y &&& z = 0#w₂) :

(ushiftRight_rec x y n) >>> (y &&& twoPow w₂ (n + 1)) := by
simp [ushiftRight_rec]

theorem ushiftRight_eq' (x : BitVec w) (y : BitVec w₂) :

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I am not a fan, but in the previous PR we marked this as simp, no?

@tobiasgrosser
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The PR message states that there are still open TODOs. Is this up-to-date?

@bollu bollu force-pushed the upstream-shiftRight-recurrence branch 2 times, most recently from a7c33b0 to 30a350a Compare July 30, 2024 19:56
@bollu bollu force-pushed the upstream-shiftRight-recurrence branch from 30a350a to d222874 Compare July 30, 2024 19:57
Comment on lines +463 to +464
ushiftRight_rec x y n = x >>> (y.truncate (n + 1)).zeroExtend w₂ := by
induction n generalizing x y

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Suggested change
ushiftRight_rec x y n = x >>> (y.truncate (n + 1)).zeroExtend w₂ := by
induction n generalizing x y
ushiftRight_rec x y n = x >>> (y.truncate (n + 1)).zeroExtend w₂ := by
induction n generalizing x y

Comment on lines +509 to +510
sshiftRightRec x y n = x.sshiftRight' ((y.truncate (n + 1)).zeroExtend w₂) := by
induction n generalizing x y

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Suggested change
sshiftRightRec x y n = x.sshiftRight' ((y.truncate (n + 1)).zeroExtend w₂) := by
induction n generalizing x y
sshiftRightRec x y n = x.sshiftRight' ((y.truncate (n + 1)).zeroExtend w₂) := by
induction n generalizing x y

@tobiasgrosser
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These were merged in leanprover#4872 and leanprover#4889.

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2 participants