Fix vcs-uvm simulation flow (#2485)

openhwgroup · Aug 30, 2024 · d577aaf · d577aaf
1 parent 8ef2859
commit d577aaf
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/verif/env/uvme/uvme_cva6_env.sv b/verif/env/uvme/uvme_cva6_env.sv
@@ -166,7 +166,7 @@ function void uvme_cva6_env_c::build_phase(uvm_phase phase);
       `uvm_info("CFG", $sformatf("Found configuration handle:\n%s", cfg.sprint()), UVM_DEBUG)
    end
 
-   cfg.rvfi_cfg.nret = cfg.CVA6Cfg.NrCommitPorts;
+   cfg.rvfi_cfg.nret = RTLCVA6Cfg.NrCommitPorts;
 
    if (cfg.enabled) begin
       void'(uvm_config_db#(uvme_cva6_cntxt_c)::get(this, "", "cntxt", cntxt));