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@bsc-loca BSC LOCA

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    29 repositories

    • 100gb-ethernet

      Public
      Tcl
      •
      Apache License 2.0
      •0•0•0•0•Updated Nov 16, 2024Nov 16, 2024

    • SafeTI

      Public
      VHDL
      •
      MIT License
      •0•1•0•0•Updated Nov 12, 2024Nov 12, 2024

    • OpenPiton-Mess-integration

      Public
      The OpenPiton Platform enhanced with MESS memory model
      Assembly
      •215•0•0•0•Updated Nov 6, 2024Nov 6, 2024

    • aurora-dma

      Public
      C
      •
      Apache License 2.0
      •0•0•0•0•Updated Nov 5, 2024Nov 5, 2024

    • axi-brom

      Public
      Tcl
      •
      Apache License 2.0
      •0•0•0•0•Updated Nov 5, 2024Nov 5, 2024

    • pulp-uart

      Public
      VHDL
      •0•0•0•0•Updated Nov 5, 2024Nov 5, 2024

    • fpga-shell

      Public
      Tcl
      •
      Other
      •1•1•0•0•Updated Oct 22, 2024Oct 22, 2024

    • openpiton-fpga

      Public
      The OpenPiton Platform
      Assembly
      •215•0•0•0•Updated Oct 7, 2024Oct 7, 2024

    • sauria

      Public
      SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator based on a GeMM systolic array engine.
      SystemVerilog
      •
      Other
      •6•23•0•1•Updated Oct 1, 2024Oct 1, 2024

    • SafeLS

      Public
      VHDL
      •
      GNU General Public License v3.0
      •0•0•0•0•Updated Jun 14, 2024Jun 14, 2024

    • redma

      Public
      ReDMA - Direct Memory Access engine with data Realignment
      SystemVerilog
      •
      Other
      •1•0•0•0•Updated Jun 13, 2024Jun 13, 2024

    • bsc-linux

      Public
      Buildroot-based Linux Image Generator
      Shell
      •0•0•0•0•Updated Jun 6, 2024Jun 6, 2024

    • ProNoC

      Public
      Verilog
      •
      Other
      •0•3•0•0•Updated May 21, 2024May 21, 2024

    • aurora-raw

      Public
      VHDL
      •
      Apache License 2.0
      •0•0•0•0•Updated May 9, 2024May 9, 2024

    • 10gb_ethernet

      Public
      Python
      •
      Apache License 2.0
      •0•0•0•0•Updated May 9, 2024May 9, 2024

    • core_tile

      Public
      SystemVerilog
      •
      Other
      •2•8•2•0•Updated Apr 16, 2024Apr 16, 2024

    • sargantana

      Public
      SystemVerilog
      •
      Other
      •4•76•0•0•Updated Apr 16, 2024Apr 16, 2024

    • mmu

      Public
      SystemVerilog
      •
      Other
      •1•2•0•0•Updated Apr 16, 2024Apr 16, 2024

    • csr

      Public
      SystemVerilog
      •
      Other
      •0•0•0•0•Updated Apr 16, 2024Apr 16, 2024

    • riscv-tests

      Public
      C
      •
      Other
      •463•0•0•0•Updated Mar 23, 2024Mar 23, 2024

    • SafeSoftDR

      Public
      C++
      •
      MIT License
      •0•2•0•0•Updated Feb 6, 2024Feb 6, 2024

    • SafeDE

      Public
      VHDL
      •
      MIT License
      •0•0•0•0•Updated Feb 6, 2024Feb 6, 2024

    • SafeDM

      Public
      VHDL
      •
      MIT License
      •0•0•0•0•Updated Feb 6, 2024Feb 6, 2024

    • SafeSU

      Public
      C
      •
      MIT License
      •0•0•0•0•Updated Feb 6, 2024Feb 6, 2024

    • hpm

      Public
      SystemVerilog
      •
      Other
      •0•1•0•0•Updated Nov 8, 2023Nov 8, 2023

    • riscv-isa-sim

      Public
      Spike, a RISC-V ISA Simulator
      C
      •
      Other
      •857•0•0•0•Updated Nov 6, 2023Nov 6, 2023

    • riscv-test-env

      Public
      C
      •
      Other
      •105•0•0•0•Updated Nov 6, 2023Nov 6, 2023

    • instruction_cache

      Public
      SystemVerilog
      •
      Other
      •0•1•0•0•Updated Nov 6, 2023Nov 6, 2023

    • cv-hpdcache

      Public
      RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores
      SystemVerilog
      •
      Other
      •18•0•0•0•Updated Oct 28, 2023Oct 28, 2023