MicroFPGA UG(h)

All

34 repositories

CRUVI
Public
CRUVI Standard Specifications
fpga vhdl verilog litex
Verilog
•
Apache License 2.0
•4•17•0•0•Updated May 6, 2024May 6, 2024
CRUVI-DOC
Public
Documentation for CRUVI
Apache License 2.0
•2•1•0•0•Updated Oct 4, 2023Oct 4, 2023
FTDI-Tools
Public
Documents and tools for FTDI USB devices: FT2232H, etc.
Apache License 2.0
•0•3•0•0•Updated Oct 2, 2023Oct 2, 2023
engine-V
Public
SoftCPU/SoC engine-V
fpga fpga-soc risc-v riscvcontest
Verilog
•
Apache License 2.0
•7•54•0•1•Updated Jun 5, 2023Jun 5, 2023
litex-boards
Public
LiteX boards files
fpga fpga-firmware fpga-board fpga-programming
Python
•288•4•0•0•Updated Jun 16, 2021Jun 16, 2021
Antti-Brain
Public
Backups of old Antti-Brain magazines.
Apache License 2.0
•0•4•0•0•Updated Feb 18, 2021Feb 18, 2021
TheCode
Public
How to start coding in any language
Apache License 2.0
•0•0•0•0•Updated Apr 3, 2020Apr 3, 2020
blinky
Public
Example LED blinking project for your FPGA dev board of choice
Verilog
•
MIT License
•71•0•0•0•Updated Oct 23, 2019Oct 23, 2019
mf-hub
Public
Python
•0•0•0•0•Updated Sep 19, 2019Sep 19, 2019
litex
Public
Build your hardware, easily!
Python
•
Other
•569•0•1•0•Updated Aug 30, 2019Aug 30, 2019
micropython
Public
MicroPython port to litex FPGA platforms
C
•
MIT License
•7.8k•0•0•0•Updated Aug 8, 2019Aug 8, 2019
litex-buildenv
Public
An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!
Python
•
BSD 2-Clause "Simplified" License
•79•0•0•0•Updated Aug 8, 2019Aug 8, 2019
linux-on-litex-vexriscv
Public
Linux on LiteX-VexRiscv
Python
•175•0•0•0•Updated Aug 6, 2019Aug 6, 2019
AnalogMAX-SDR
Public
SDR Projects for AnalogMAX boards
C++
•
Apache License 2.0
•0•1•0•0•Updated Jul 30, 2019Jul 30, 2019
fpga-sdk-prj
Public
FPGA-based SDK projects for SCRx cores
Verilog
•
Other
•22•0•0•0•Updated Jul 19, 2019Jul 19, 2019
sc-bl
Public
Syntacore first stage bootloader
C
•8•0•0•0•Updated Jul 17, 2019Jul 17, 2019
MEGA65-Hacks
Public
Hacks and non standard things with MEGA65 Computer
fpga fpga-game fpga-soc fpga-board fpga-programming mega65
Apache License 2.0
•0•0•8•0•Updated Jun 29, 2019Jun 29, 2019
scr1-sdk
Public
open-source SDKs for the SCR1 core
C
•
Other
•33•0•0•0•Updated Apr 12, 2019Apr 12, 2019
scr1
Public
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
SystemVerilog
•
Other
•275•0•0•0•Updated Apr 11, 2019Apr 11, 2019
meM
Public
micro embedded Matrix
fpga xilinx vhdl-code gowin
VHDL
•
Apache License 2.0
•2•4•0•0•Updated Feb 13, 2019Feb 13, 2019
esa
Public
Electronics? Simple! Again :)
Apache License 2.0
•0•0•0•0•Updated Feb 12, 2019Feb 12, 2019
DIPSY
Public
DIPSY - DIP sized magical thing!
Apache License 2.0
•0•2•0•0•Updated Feb 5, 2019Feb 5, 2019
riscv-contest-2019
Public
RISC-V Soft CPU Contest 2019
fpga riscv risc-v riscvcontest
Apache License 2.0
•0•1•0•0•Updated Dec 25, 2018Dec 25, 2018
engine-V-simulator
Public
Simulator for engine-V
Pascal
•
Apache License 2.0
•2•0•2•0•Updated Dec 6, 2018Dec 6, 2018
riscv-compliance
Public
Assembly
•
BSD 3-Clause "New" or "Revised" License
•204•0•2•0•Updated Nov 26, 2018Nov 26, 2018
zephyr
Public
Primary GIT Repository for the Zephyr Project
riscv microsemi
C
•
Apache License 2.0
•6.6k•0•0•0•Updated Nov 25, 2018Nov 25, 2018
riscv-contest-2018
Public
RISCV SoftCPU Contest 2018
fpga riscv riscvcontest
Apache License 2.0
•4•14•8•0•Updated Nov 17, 2018Nov 17, 2018
riscv-tests
Public
C
•
Other
•463•0•0•0•Updated Nov 16, 2018Nov 16, 2018
riscvSoftcoreContest
Public
Verilog
•
Apache License 2.0
•16•1•0•0•Updated Nov 1, 2018Nov 1, 2018
Intel-Cyclone-10GX-helloworld
Public
Hello World with Intel Cyclone 10 GX
Verilog
•
Apache License 2.0
•2•0•0•0•Updated Oct 31, 2018Oct 31, 2018