Icicle Kit jumpers

[Bharris100]

I noticed that in PolarFire® FPGA and PolarFire SoC FPGA Programming User Guide_VA in section 10.3.1 Programming the SPI Flash Using External Processor, it talks about a jumper I can set to pull SPI_EN low to tri-state the System Controller SPI IO. I am working on the following setup: I am using MSS_SPI0 with the IO connected in Libero constraints, to the RPi connectors acting as the external master SPI, with jumpers from the RPi to the FLASH ICICLE KIT device pins. I already have functions written in my code to access the FLASH which I am using to verify the setup is correct, I just what to be able to make sure the SPI_EN pin is pulled low as stated in the UG.

My question is, which jumper is the UG referring too?
Thanks.

[hughbreslin]

From the schematics this pin is tied high as R195 is NL:

I can see R195 is NL on the underside of my board:

The user guide is being a bit more abstract, you could connect this pin to a jumper, in the case of this kit it isn't though.

Based on the set up you described this stands out from section 10.3.1:

Neither the system controller nor the fabric/MSS (for PolarFire SoC FPGA only) can drive the SPI interface.

[Bharris100]

Hi @hughbreslin,
Thank you for clarifying the R195 point, it is something I overlooked.
I made the assumption that the section 10.3.1 statement you highlighted was making the point that neither the MSS or fabric could access the SPI internally in the FPGA, and I was thinking I would take the MSS_SPI0 out to the RPi pins on the board and then using a test clip on the flash device drive it like the master diagram in the same document indicates.
I have now been informed that there is a possibility of accessing the SPI FLASH using the Macro Library "PF_SPI" component tied to the MSS_SPI0 ports on the MSS. I am trying this approach at this time.
Thanks for your help, I appreciate it.