I want to know how to configure the PLL(CCC).

[Usutatsu]

  I want to know how to configure the PLL(CCC).

CCC has 4 unit, CCC_NW, CCC_NN, CCC_SW and CCC_SN.

The latest reference designe of ICICLE Kit is using CCC_NW as FPGA fabric clock generator.
However I want to use CCC_SW or CCC_SN as FPGA fabric clock gerator and output fabric clock through GPIO.

Where do I change to set which part of the CCC to use?

Originally posted by @Usutatsu in #251

[hughbreslin]

This is a duplicate of 251, please check there for a response. Someone should be back to you shortly.